NEC Develops MRAM Cell Technology
NEC has succeeded in developing new magnetoresistive random access memory (MRAM) cell technology suitable for high speed memory macro embedded in next generation system LSIs.
The newly developed cell technology includes three key elements; a 2T1MTJ (two transistors and one magnetoresistive tunneling junction) cell structure to accelerate write mode cycle time, a 5T2MTJ cell structure to accelerate read mode cycle time and a write-line-inserted MTJ to reduce write current. The new cell technology realizes added-value, non-volatile MRAM macros that can be substituted for SRAM (static random access memory) macros embedded in system LSIs.
Features of the newly developed elements:
- 200MHz random access write operation: Elimination of the upper limit of the writing current by a 2T1MTJ cell enables high speed write operation. In conventional MRAM memory cells, writing current must be within upper and lower limits (note 1). This complicates the write current source circuit and it thus cannot operate at over 100MHz.
- 500MHz random access read operation: Intra-cell-signal amplification in a 5T2MTJ cell enables high speed read operation. Cell current signal is amplified and transformed into voltage signal in each cell. In conventional MRAM memory cells, a small reading current difference signal through the bit line with large parasitic capacitance makes sense amplifier circuits complicated. These kinds of circuits cannot operate at over 200MHz. 3. Reduction of writing current down to 1/3: A write-line-inserted MTJ structure reduces writing current to 1/3 as compared with conventional MTJ structure writing currents. This small current reduces MRAM cell size.
Recently, the area ratio of memory macros embedded in system LSIs has increased. Such memory macros can be classified into two types; high speed RAM (Random Access Memory) used temporarily during data processing and NVM (Non Volatile Memory) used for data retention during power-off and/or stand-by state. To overcome this issue, MRAM technology, which is expected to possess "unified memory" (boasting the merits of both types of memory), has been developed. However, it is difficult for conventional MRAM technology to enable over 100MHz of random-access-operation frequency, although speed of this level is necessary for next generation system LSIs.
To realize "unified memory," NEC has been developing MRAM technology to accelerate both read and write operation speeds, and has succeeded in developing MRAM cell technology suitable for a high speed memory macro embedded in next generation system LSIs.
NEC's research is partially supported by the New Energy and Industrial Technology Development Organization's (NEDO) MRAM technology development project for realization of high-speed and non-volatile memory macro embedded in system LSIs.
Features of the newly developed elements:
- 200MHz random access write operation: Elimination of the upper limit of the writing current by a 2T1MTJ cell enables high speed write operation. In conventional MRAM memory cells, writing current must be within upper and lower limits (note 1). This complicates the write current source circuit and it thus cannot operate at over 100MHz.
- 500MHz random access read operation: Intra-cell-signal amplification in a 5T2MTJ cell enables high speed read operation. Cell current signal is amplified and transformed into voltage signal in each cell. In conventional MRAM memory cells, a small reading current difference signal through the bit line with large parasitic capacitance makes sense amplifier circuits complicated. These kinds of circuits cannot operate at over 200MHz. 3. Reduction of writing current down to 1/3: A write-line-inserted MTJ structure reduces writing current to 1/3 as compared with conventional MTJ structure writing currents. This small current reduces MRAM cell size.
Recently, the area ratio of memory macros embedded in system LSIs has increased. Such memory macros can be classified into two types; high speed RAM (Random Access Memory) used temporarily during data processing and NVM (Non Volatile Memory) used for data retention during power-off and/or stand-by state. To overcome this issue, MRAM technology, which is expected to possess "unified memory" (boasting the merits of both types of memory), has been developed. However, it is difficult for conventional MRAM technology to enable over 100MHz of random-access-operation frequency, although speed of this level is necessary for next generation system LSIs.
To realize "unified memory," NEC has been developing MRAM technology to accelerate both read and write operation speeds, and has succeeded in developing MRAM cell technology suitable for a high speed memory macro embedded in next generation system LSIs.
NEC's research is partially supported by the New Energy and Industrial Technology Development Organization's (NEDO) MRAM technology development project for realization of high-speed and non-volatile memory macro embedded in system LSIs.
