One of the primary challenges facing the industry - and a key motivation for forming the HMCC - is that the memory bandwidth required by high-performance computers and next-generation networking equipment has increased beyond what conventional memory architectures can provide. The term "memory wall" has been used to describe the problem. Breaking through the memory wall requires a new architecture that can provide increased density and bandwidth at significantly reduced power consumption.
Hybrid Memory Cube is a new DRAM memory architecture that combines high-speed logic process technology with a stack of through-silicon-via (TSV) bonded memory die. According to the consortium, it offers dramatic improvements in performance, breaking through the memory wall and enabling performance and bandwidth improvements - a single HMC can provide more than 15x the performance of a DDR3 module. The architecture of HMC is exponentially more efficient than current memory, utilizing 70% less energy per bit than DDR3 DRAM technologies. Hybrid Memory Cube's increased density per bit and reduced form factor contribute to lower total cost of ownership, by allowing more memory into each machine and using nearly 90% less space than today's RDIMMs.
"This collaborative industry effort will serve as an accelerator for highly promising technology that will benefit the entire industry," said Jim Elliott, Vice President, Memory Marketing and Product Planning, Samsung Semiconductor, Inc. "The consortium will help to bring about a game-changing system solution for system designers and manufacturers that is expected to outperform memory options offered today."
"HMC is unlike anything currently on the radar," said Robert Feurle, Micron's Vice President for DRAM Marketing. "HMC brings a new level of capability to memory that provides exponential performance and efficiency gains that will redefine the future of memory. Guidance by the industry consortium will help drive the fastest possible adoption of the technology, resulting in what we believe will be radical improvements to computing systems."
The HMCC's memory specifications will be co-developed among the consortium members. The consortium is open to an unlimited number of adopters, with the opportunity to receive early access to draft specifications and participate in specification discussions and development.