Rambus offers its DDR3 memory controller interface solution to its licensees as a PHY development package (PDP) which allows memory interface designers to customize their DDR3 implementation for their specific application. Rambus' DDR3 interface solution PDP includes all the necessary building blocks, PHY architecture, schematics, models, generic layout, floor plan, verification IP, implementation documentation, testing documentation, design scripts and simulation files, to ensure design success.
The DDR3 interface solution builds on Rambus technologies such as:
- FlexPhase circuits for optimum memory system timing Output driver calibration which supports high data rates and improved system voltage margin
- On-die termination calibration for improved signaling environment
- LabStation software for rapid bring-up, characterization and validation