Taiwan Semiconductor Manufacturing Co. (TSMC), the world’s largest foundry, plans to fully implement extreme ultraviolet (EUV) lithography to make 5nm chips by the end of this decade. "We estimate that EUV will be a cost-effective tool for high-volume manufacturing by 2020, in time for our 5nm ramp," TSMC Co-CEO Mark Liu said at an event to announce the company’s second-quarter results. "We plan to use EUV lithography extensively in 5nm to improve density, simplify process complexity and reduce cost."

The company said it has been using 7nm as a development vehicle for EUV, achieving what it called good integration of EUV scanners, masks and photoresist. TSMC said it is running four EUV scanners for infrastructure development and will move in another two NXE:3400 EUV production tools from ASML in the first quarter of 2017.

TSMC said it has implemented a 125 watt EUV source in its ASML NXE:3350 equipment to improve productivity. In the meantime, the company has also developed in-house EUV mask, material, inspection and repair technology to integrate its EUV lithography.

TSMC competitors such as Samsung appear more convinced about the commercial viability of EUV. A press report in South Korea said that Samsung plans to use EUV at 7nm.

TSMC also said it will see its first revenue from 10nm during the first quarter of 2017, and it expects 10nm to ramp steeply throughout next year.

"Our 10nm has been transferred from R&D to production," Liu said. "Our first 10nm customer product has been produced with satisfactory functional yield. So fa", three customer products have been taped out to us.”

At the 7nm node, TSMC said its yield improvement on a 256 megabit SRAM test device is ahead of schedule.

"We believe our 7nm power, performance and area density (PPA) is ahead of our competitors," Liu said. TSMC’s mobile and high-performance computing customers "all have aggressive product tape out plans in the first half of 2017 with volume production planned in early 2018," he added.