TSMC Closes 32nm Project to Focus on 28nm
Taiwan Semiconductor Manufacturing Co. (TSMC) has decided to stop its 32-nanometer process addressing all resources on the development of the 28nm process, according to reports.
The world's largest silicon foundry had initially planned to begin to offer 32nm process by the end of this year, with industry watchers believing TSMC closed the 32nm project due to yield issues with its 40nm process, the Taiwan Economic News reported today.
However, industry executives believe that TSMC is keen to offer 28nm process to keep up with circuit geometry advances of microprocessors, graphic processing units and field programmable gate arrays (FPGAs) and has worked with several chip design houses in these sectors.
Investors presume these design houses are customers of TSMC`s 40nm process service migrating to 28nm layouts.
Also, some industry executives believe that TSMC will use 28nm process on the system-on-chip for Intel`s Atom processors.
TSMC's 28nm development and ramp seems to has remained on schedule since the company announced the technology in September 2008. Last August, TSMC added a low power process to its 28nm high-k metal gate (HKMG) road map, scheduled to enter risk production in the third quarter of 2010. Risk production for the 28nm low power (LP) SiON process was scheduled for the end of first quarter of 2010, while risk production for the 28nm HP process was expected at the end of second quarter, 2010.
TSMC has announced the development of the 28nmHPL (low power with HKMG) process, which is a derivative of TSMC's high performance HKMG technology and features low power, low leakage, and medium-high performance on a gate-last approach. It supports low leakage applications such as cell phone, smart netbook, wireless communication and portable consumer electronics.
The 28nm HPL process comes complete with comprehensive device support and is considered suitable as a SoC platform for general market applications. It is differentiated from the 28LP technology, which is positioned for cellular and handheld applications where lower cost and faster time-to-market from a SiON process is most attractive.
The 28nm HP process is also built on a gate-last approach and supports performance driven devices such as CPUs, GPUs, Chipsets, FPGAs, video game console and mobile computing applications.
TSMC is also expected to collaborate with Fujitsu Microelectronics Ltd. on the 28-nanometer (nm) process technology. The Japanese company has already collaborated with TSMC on the 40nm production.
However, industry executives believe that TSMC is keen to offer 28nm process to keep up with circuit geometry advances of microprocessors, graphic processing units and field programmable gate arrays (FPGAs) and has worked with several chip design houses in these sectors.
Investors presume these design houses are customers of TSMC`s 40nm process service migrating to 28nm layouts.
Also, some industry executives believe that TSMC will use 28nm process on the system-on-chip for Intel`s Atom processors.
TSMC's 28nm development and ramp seems to has remained on schedule since the company announced the technology in September 2008. Last August, TSMC added a low power process to its 28nm high-k metal gate (HKMG) road map, scheduled to enter risk production in the third quarter of 2010. Risk production for the 28nm low power (LP) SiON process was scheduled for the end of first quarter of 2010, while risk production for the 28nm HP process was expected at the end of second quarter, 2010.
TSMC has announced the development of the 28nmHPL (low power with HKMG) process, which is a derivative of TSMC's high performance HKMG technology and features low power, low leakage, and medium-high performance on a gate-last approach. It supports low leakage applications such as cell phone, smart netbook, wireless communication and portable consumer electronics.
The 28nm HPL process comes complete with comprehensive device support and is considered suitable as a SoC platform for general market applications. It is differentiated from the 28LP technology, which is positioned for cellular and handheld applications where lower cost and faster time-to-market from a SiON process is most attractive.
The 28nm HP process is also built on a gate-last approach and supports performance driven devices such as CPUs, GPUs, Chipsets, FPGAs, video game console and mobile computing applications.
TSMC is also expected to collaborate with Fujitsu Microelectronics Ltd. on the 28-nanometer (nm) process technology. The Japanese company has already collaborated with TSMC on the 40nm production.
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