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SiFive Announces New RISC-based U8-Series Core IP

SiFive Announces New RISC-based U8-Series Core IP

Enterprise & IT Oct 30,2019 0

SiFive, Inc., a provider of commercial RISC-V processor IP and silicon solutions, has announced a portfolio of high-performance IP for scalable SoC Designs.

RISC-V is actually a competitor to the Arm in the embedded market. There are vendors which make the switch from licensing Arm’s architecture and IP designs to the open-source RISC-V architecture and either licensed or custom-made IP based on the ISA. ZTE has already announced its own SoC based on the RISC architecture.

SiFive was founded in 2015 by the researchers who invented the RISC-V instruction set at UC Berkeley back in 2010. The company’s goal was to develop and implement CPUs and IP based on the RISC-V ISA and produce the first hardware based on the technology.

The new SiFive U8-Series Core IP is based on the RISC-V ISA and is a superscalar design, featuring a scalable out-of-order pipeline with configurable options for use in real-time or application processors. Designed to offer energy- and area-efficiency, the SiFiveSiFive U8-Series microarchitecture offers excellent performance and customizability , according to the company.

SiFive claims that the U8-Series microarchitecture was designed to offer over 1.5X improvement in area efficiency and 1.5X performance-per-watt vs. the Arm Cortex-A72. The SiFive U8-Series Core IP is multi-core capable with Linux capable memory management unit to enable general application processor designs. The microarchitecture can support real-time mode for mission-critical operation.

Featuring optional floating-point unit, customized instruction extension capability, and RISC-V vector extension support, the SiFive U8-Series Core IP can be configured and customized to the target use case, whether in Automotive or AI at the Edge or End-point application.

The new SiFive HBM2E+ IP is designed to enable compute-intensive workloads, including deep learning processing in high performance compute, data center, and edge AI devices. Featuring industry-standard interfaces, SiFive HBM2E+ IP is simple to integrate into new designs and enables an optimized CPU to memory path, using a scalable interface to enable chiplet designs as well as performance.

Validated in a 7nm process technology, the SiFive HBM2E+ solution offers memory bandwidth up to 400Gbps, or 3.2Gbps per pin. HBM’s stacking properties enable smaller footprints and lower power consumption than similar capacity DDR-style memory, with higher bandwidth, critical for processing memory-intensive deep learning workloads.

SiFive custom instruction extensions deliver specific accelerations tailored to the workload without impacting base ISA or other formal extension compatibility and are supported by industry-standard tools such as IAR Workbench.

On the same 7nm process, the U84 lands in at 0.28mm² per core and a cluster comprising four cores and a 2MB L2 cache measure in at 2.63mm². For comparison, an Arm Cortex-A55 as measured on the Kirin 980, also on 7nm, a core with its 128KB private L2 cache comes in at 0.36mm².

Finally, SiFive is able to configure of up to 9 CPU cores into a coherent cluster with a shared L2. The IP is also able to this in a heterogeneous way, similar to Arm’s big.LITTLE approach, employing both U8 and U7 series and even S-Series CPUs into the same cluster.

“The introduction of the new, SiFive U8-Series microarchitecture is a major milestone, “ said Naveed Sherwani, CEO, SiFive. “The availability of a scalable out-of-order RISC-V processor to use in domain-specific applications heralds a new era of configurable, customized SoC designs based on RISC-V. SiFive is continuing to lead with IP and silicon solutions for automotive, data center attach, and Edge AI.”

SiFive will initially offer two standard cores in the SiFive U8-Series Core IP lineup. The standard core offerings will be the SiFive U84 core, optimized for power efficiency and area efficiency, and the SiFive U87 core with vector processing. The SiFive U84 design, focused on optimized efficiency, is the lead standard core.

The U87 will be available later next year, whilst the U84 is also being finalised right now. The company has the U84 IP running internally on FPGA platforms.

Tags: SiFiveRISC-V
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