3M and IBM to Develop Silicon Skyscrapers
3M and IBM plan to jointly develop the first adhesives that can be used to package semiconductors into stacked silicon "towers," aiming to create microprocessors composed of layers of up to 100 separate chips.
Such stacking would allow for dramatically higher levels of integration for information technology and consumer electronics applications. Processors could be tightly packed with memory and networking, for example, into a "brick" of silicon that would create a computer chip 1,000 times faster than today?s fastest microprocessor.
The companies' work can potentially leapfrog today's current attempts at stacking chips vertically - known as 3D packaging. The joint research tackles some of the thorniest technical issues underlying the industry's move to true 3D chip forms. For example, new types of adhesives are needed that can efficiently conduct heat through a densely packed stack of chips and away from heat-sensitive components such as logic circuits.
"Today's chips, including those containing '3D' transistors, are in fact 2D chips that are still very flat structures," said Bernard Meyerson, VP of Research, IBM. "Our scientists are aiming to develop materials that will allow us to package tremendous amounts of computing power into a new form factor - a silicon 'skyscraper.' We believe we can advance the state-of-art in packaging, and create a new class of semiconductors that offer more speed and capabilities while they keep power usage low -- key requirements for many manufacturers, especially for makers of tablets and smartphones."
Many types of semiconductors, including those for servers and games, today require packaging and bonding techniques that can only be applied to individual chips. 3M and IBM plan to develop adhesives that can be applied to silicon wafers, coating hundreds or even thousands of chips at a single time. Current processes are akin to frosting a cake slice-by-slice.
Under the agreement, IBM will draw on its expertise in creating semiconductor packaging processes, and 3M will provide its expertise in developing and manufacturing adhesive materials.
3M is already producing adhesives used in high-tech applications such as the semiconductor industry, consumer electronic devices, aerospace and solar applications.
The companies' work can potentially leapfrog today's current attempts at stacking chips vertically - known as 3D packaging. The joint research tackles some of the thorniest technical issues underlying the industry's move to true 3D chip forms. For example, new types of adhesives are needed that can efficiently conduct heat through a densely packed stack of chips and away from heat-sensitive components such as logic circuits.
"Today's chips, including those containing '3D' transistors, are in fact 2D chips that are still very flat structures," said Bernard Meyerson, VP of Research, IBM. "Our scientists are aiming to develop materials that will allow us to package tremendous amounts of computing power into a new form factor - a silicon 'skyscraper.' We believe we can advance the state-of-art in packaging, and create a new class of semiconductors that offer more speed and capabilities while they keep power usage low -- key requirements for many manufacturers, especially for makers of tablets and smartphones."
Many types of semiconductors, including those for servers and games, today require packaging and bonding techniques that can only be applied to individual chips. 3M and IBM plan to develop adhesives that can be applied to silicon wafers, coating hundreds or even thousands of chips at a single time. Current processes are akin to frosting a cake slice-by-slice.
Under the agreement, IBM will draw on its expertise in creating semiconductor packaging processes, and 3M will provide its expertise in developing and manufacturing adhesive materials.
3M is already producing adhesives used in high-tech applications such as the semiconductor industry, consumer electronic devices, aerospace and solar applications.
