Intel's Tri-Gate Transistors Based on its 22nm Logic Technology Available Later This Year
Intel today announced a breakthrough in the evolution of the transistor. For the first time, transistors using a three-dimensional structure will be put into high-volume manufacturing at the 22nm node in an Intel chip codenamed "Ivy Bridge."
Intel will introduce a 3-D transistor design called Tri-Gate, first disclosed by Intel in 2002, into high-volume manufacturing at the 22-nanometer (nm) node in the upcoming Ivy Bridge." chips, which will be available by the end of 2011.
The 22-nm devices are shrinks of the Sandy Bridge microarchitecture known as Ivy Bridge in the "tick" side of the product introduction cycle that Intel has delivered six times going back to 65-nm.
The three-dimensional Tri-Gate transistors represent a fundamental departure from the two-dimensional planar transistor structure that has powered not only all computers, mobile phones and consumer electronics to-date.
"Intel's scientists and engineers have once again reinvented the transistor, this time utilizing the third dimension," said Intel President and CEO Paul Otellini. "Amazing, world-shaping devices will be created from this capability as we advance Moore's Law into new realms."
Scientists have long recognized the benefits of a 3-D structure for sustaining the pace of Moore's Law as device dimensions become so small that physical laws become barriers to advancement. Intel claims that it is able to deploy its 3-D Tri-Gate transistor design into high-volume manufacturing, ushering in the next era of Moore's Law and opening the door to a new generation of innovations across a broad spectrum of devices.
Moore's Law is a forecast for the pace of silicon technology development that states that roughly every 2 years transistor density will double, while increasing functionality and performance and decreasing costs. It has become the basic business model for the semiconductor industry for more than 40 years.
Intel's 3-D Tri-Gate transistors enable chips to operate at lower voltage with lower leakage, providing a combination of improved performance and energy efficiency compared to previous transistors.
The 22nm 3-D Tri-Gate transistors provide up to 37 percent performance increase at low voltage versus Intel's 32nm planar transistors. As such, Intel aims to use these 22nm chips in small handheld devices, which operate using less energy to "switch" back and forth. Alternatively, the new transistors consume less than half the power when at the same performance as 2-D planar transistors on 32nm chips.
"The performance gains and power savings of Intel's unique 3-D Tri-Gate transistors are like nothing we've seen before," said Mark Bohr, Intel Senior Fellow. "This milestone is going further than simply keeping up with Moore's Law. The low-voltage and low-power benefits far exceed what we typically see from one process generation to the next. It will give product designers the flexibility to make current devices smarter and wholly new ones possible. We believe this breakthrough will extend Intel's lead even further over the rest of the semiconductor industry."
The 3-D Tri-Gate transistors are a reinvention of the transistor. The traditional "flat" two-dimensional planar gate is replaced with an incredibly thin three-dimensional silicon fin that rises up vertically from the silicon substrate. Control of current is accomplished by implementing a gate on each of the three sides of the fin ? two on each side and one across the top -- rather than just one on top, as is the case with the 2-D planar transistor. The additional control enables as much transistor current flowing as possible when the transistor is in the "on" state (for performance), and as close to zero as possible when it is in the "off" state (to minimize power), and enables the transistor to switch very quickly between the two states (again, for performance).
Just as skyscrapers let urban planners optimize available space by building upward, Intel's 3-D Tri-Gate transistor structure provides a way to manage density. Since these fins are vertical in nature, transistors can be packed closer together, a critical component to the technological and economic benefits of Moore's Law. For future generations, designers also have the ability to continue growing the height of the fins to get even more performance and energy-efficiency gains.
The 3-D Tri-Gate transistor will be implemented in the company's upcoming manufacturing process, called the 22nm node, in reference to the size of individual transistor features. More than 6 million 22nm Tri-Gate transistors could fit in the period at the end of this sentence.
Today, Intel demonstrated the world's first 22nm microprocessor, codenamed "Ivy Bridge," working in a laptop, server and desktop computer. Ivy Bridge-based Intel Core family processors will be the first high-volume chips to use 3-D Tri-Gate transistors. Ivy Bridge is slated for high-volume production readiness by the end of this year.
The 22-nm devices are shrinks of the Sandy Bridge microarchitecture known as Ivy Bridge in the "tick" side of the product introduction cycle that Intel has delivered six times going back to 65-nm.
The three-dimensional Tri-Gate transistors represent a fundamental departure from the two-dimensional planar transistor structure that has powered not only all computers, mobile phones and consumer electronics to-date.
"Intel's scientists and engineers have once again reinvented the transistor, this time utilizing the third dimension," said Intel President and CEO Paul Otellini. "Amazing, world-shaping devices will be created from this capability as we advance Moore's Law into new realms."
Scientists have long recognized the benefits of a 3-D structure for sustaining the pace of Moore's Law as device dimensions become so small that physical laws become barriers to advancement. Intel claims that it is able to deploy its 3-D Tri-Gate transistor design into high-volume manufacturing, ushering in the next era of Moore's Law and opening the door to a new generation of innovations across a broad spectrum of devices.
Moore's Law is a forecast for the pace of silicon technology development that states that roughly every 2 years transistor density will double, while increasing functionality and performance and decreasing costs. It has become the basic business model for the semiconductor industry for more than 40 years.
Intel's 3-D Tri-Gate transistors enable chips to operate at lower voltage with lower leakage, providing a combination of improved performance and energy efficiency compared to previous transistors.
The 22nm 3-D Tri-Gate transistors provide up to 37 percent performance increase at low voltage versus Intel's 32nm planar transistors. As such, Intel aims to use these 22nm chips in small handheld devices, which operate using less energy to "switch" back and forth. Alternatively, the new transistors consume less than half the power when at the same performance as 2-D planar transistors on 32nm chips.
"The performance gains and power savings of Intel's unique 3-D Tri-Gate transistors are like nothing we've seen before," said Mark Bohr, Intel Senior Fellow. "This milestone is going further than simply keeping up with Moore's Law. The low-voltage and low-power benefits far exceed what we typically see from one process generation to the next. It will give product designers the flexibility to make current devices smarter and wholly new ones possible. We believe this breakthrough will extend Intel's lead even further over the rest of the semiconductor industry."
The 3-D Tri-Gate transistors are a reinvention of the transistor. The traditional "flat" two-dimensional planar gate is replaced with an incredibly thin three-dimensional silicon fin that rises up vertically from the silicon substrate. Control of current is accomplished by implementing a gate on each of the three sides of the fin ? two on each side and one across the top -- rather than just one on top, as is the case with the 2-D planar transistor. The additional control enables as much transistor current flowing as possible when the transistor is in the "on" state (for performance), and as close to zero as possible when it is in the "off" state (to minimize power), and enables the transistor to switch very quickly between the two states (again, for performance).
Just as skyscrapers let urban planners optimize available space by building upward, Intel's 3-D Tri-Gate transistor structure provides a way to manage density. Since these fins are vertical in nature, transistors can be packed closer together, a critical component to the technological and economic benefits of Moore's Law. For future generations, designers also have the ability to continue growing the height of the fins to get even more performance and energy-efficiency gains.
The 3-D Tri-Gate transistor will be implemented in the company's upcoming manufacturing process, called the 22nm node, in reference to the size of individual transistor features. More than 6 million 22nm Tri-Gate transistors could fit in the period at the end of this sentence.
Today, Intel demonstrated the world's first 22nm microprocessor, codenamed "Ivy Bridge," working in a laptop, server and desktop computer. Ivy Bridge-based Intel Core family processors will be the first high-volume chips to use 3-D Tri-Gate transistors. Ivy Bridge is slated for high-volume production readiness by the end of this year.
