New Sony LSIs for Mobile Communications Achieve A Data Transfer Rate of 6.3 Gbps
Japan's National University Corporation, Tokyo Institute of Technology and Sony have jointly developed a radio frequency LSI and a baseband LSI that enables millimeter-wave wireless data transfer at the world's fastest rate of 6.3 Gb/s.
This technological achievement will be presented at the International Solid-State Circuits Conference (ISSCC) held in San Francisco from February 19, 2012.
The demand for higher wireless communication speeds has led to a consequential increase in the need for more frequencies. The shortage of frequencies under 6 GHz has become an increasingly critical issue. Additionally, high quality sound and video require high bandwidth for inter-device data transmission.
The Tokyo Institute of Technology and Sony have jointly developed a millimeter-wave wireless data transfer technology that realizes both high-speed and low-power data transfer between mobile devices. Implementation of this technology will enable users to transmit and receive data at much higher speeds between mobile devices without the need for cable connections. This technology will also enable users to enjoy uncompressed high-quality video streaming from a mobile device to a display.
In this joint development, Sony designed the digital parts of the BB LSI and the chip unit as a whole, while the Tokyo Institute of Technology designed the RF LSI and the analog parts of BB LSI.
Sony says it has eveloped a high-efficiency and high-integrity Low-Density Parity-Check (LDPC - rate 14/15 ) error-correcting code, which significantly decreases the amount of redundant data that is required for error correction. The error-correction code, which uses a sparse parity-check matrix, has enabled LDPC decoding at the world?s lowest (for an LDPC decoder implemented in silicon) per-bit energy efficiency of 11.8 pJ/b (74 mW at 6.3 Gb/s). The specific LDPC code was also employed at the 60 GHz band millimeter-wave wireless communication standards (IEEE 802.15.3c).
A research team led by Professor Akira Matsuzawa and Associate Professor Kenichi Okada at the Tokyo Institute of Technology developed an RF LSI that functions as a 60 GHz band millimeter-wave direct-conversion transceiver (wireless transceiver directly converted from RF signal to base band signal). The RF LSI applies the 16 Quadrature Amplitude Modulation (16QAM) to the wireless signal and for every frequency channel defined under the 60 GHz band millimeter-wave wireless communication standards (IEEE 802.15.3c, ECMA-387 and ISO/IEC 13156)
This breakthrough has been achieved by a back-to-back layout structure of the injection locked oscillator (a technology generating a signal with a desired frequency by injecting a signal with another frequency into an oscillator). The analog-to-digital converter (ADC) on the BB LSI consumes just 12mW at a sampling rate of 2.3 G samples/s as an ADC integrated in a 60 GHz wireless chip. This was achieved by developing a simple comparator, which does not increase the signal conversion noise.
Part of this R&D was sponsored by the Japanese Ministry of Internal Affairs and Communications (MIC).
The demand for higher wireless communication speeds has led to a consequential increase in the need for more frequencies. The shortage of frequencies under 6 GHz has become an increasingly critical issue. Additionally, high quality sound and video require high bandwidth for inter-device data transmission.
The Tokyo Institute of Technology and Sony have jointly developed a millimeter-wave wireless data transfer technology that realizes both high-speed and low-power data transfer between mobile devices. Implementation of this technology will enable users to transmit and receive data at much higher speeds between mobile devices without the need for cable connections. This technology will also enable users to enjoy uncompressed high-quality video streaming from a mobile device to a display.
In this joint development, Sony designed the digital parts of the BB LSI and the chip unit as a whole, while the Tokyo Institute of Technology designed the RF LSI and the analog parts of BB LSI.
Sony says it has eveloped a high-efficiency and high-integrity Low-Density Parity-Check (LDPC - rate 14/15 ) error-correcting code, which significantly decreases the amount of redundant data that is required for error correction. The error-correction code, which uses a sparse parity-check matrix, has enabled LDPC decoding at the world?s lowest (for an LDPC decoder implemented in silicon) per-bit energy efficiency of 11.8 pJ/b (74 mW at 6.3 Gb/s). The specific LDPC code was also employed at the 60 GHz band millimeter-wave wireless communication standards (IEEE 802.15.3c).
A research team led by Professor Akira Matsuzawa and Associate Professor Kenichi Okada at the Tokyo Institute of Technology developed an RF LSI that functions as a 60 GHz band millimeter-wave direct-conversion transceiver (wireless transceiver directly converted from RF signal to base band signal). The RF LSI applies the 16 Quadrature Amplitude Modulation (16QAM) to the wireless signal and for every frequency channel defined under the 60 GHz band millimeter-wave wireless communication standards (IEEE 802.15.3c, ECMA-387 and ISO/IEC 13156)
This breakthrough has been achieved by a back-to-back layout structure of the injection locked oscillator (a technology generating a signal with a desired frequency by injecting a signal with another frequency into an oscillator). The analog-to-digital converter (ADC) on the BB LSI consumes just 12mW at a sampling rate of 2.3 G samples/s as an ADC integrated in a 60 GHz wireless chip. This was achieved by developing a simple comparator, which does not increase the signal conversion noise.
Part of this R&D was sponsored by the Japanese Ministry of Internal Affairs and Communications (MIC).
