Elpida to Set Up R&D Center at Rexchip to Develop 40nm 4F2 Process Technology
Taiwanese DRAM manufacturer Rexchip Electronics and Elpida Memory today jointly announced the establishment of a technology development center at Rexchip during the first quarter of 2010, cooperating on the development of the next generation 40nm 4F2 process technology.
Beginning with front-end technology, Elpida plans to gradually utilize Rexchip as the Taiwan PC DRAM design center. This decision also allows Taiwan to achieve the goal of possessing independent DRAM process technology.
At the same time, Rexchip Electronics also announced plans to migrate to 40nm 6F2 process technology in 2010, mass producing 2Gb DDR3 products. Currently both parties plan for Rexchip's 80,000 12" monthly wafers to be fully converted to 40nm 6F2 process technology by the end of 2010. If the market demand is not as expected, Rexchip will first migrate half of its capacity, with the remainder utilizing 65nm-XS process technology. As a result of Rexchip's 65nm-XS process chip size being equivalent to other DRAM manufacturers' 50nm process, under these conditions, Rexchip is still capable of possessing comparable competitive technology. Furthermore, Elpida's Hiroshima Fab has already completed the pilot run of the 40nm 6F² process, where yields have already exceeded expectations, where Elpida initially plans for half of its 130,000 12" wafers per month to be converted and further conversion dependent on market conditions.
As the 40nm 6F2 process technology reduces the chip size, when compared to the current generation of 65nm products, this will effectively reduce relative die costs by 50%. This process is also the most advanced among industry peers, with the smallest die size, producing high performance and low power consumption, mainstream DDR3 products. Elpida also said that the process technology - also depending on certain conditions - will be transferred to its manufacturing partner Powerchip Semiconductor, Winbond, and Promos.
At the same time, Rexchip Electronics also announced plans to migrate to 40nm 6F2 process technology in 2010, mass producing 2Gb DDR3 products. Currently both parties plan for Rexchip's 80,000 12" monthly wafers to be fully converted to 40nm 6F2 process technology by the end of 2010. If the market demand is not as expected, Rexchip will first migrate half of its capacity, with the remainder utilizing 65nm-XS process technology. As a result of Rexchip's 65nm-XS process chip size being equivalent to other DRAM manufacturers' 50nm process, under these conditions, Rexchip is still capable of possessing comparable competitive technology. Furthermore, Elpida's Hiroshima Fab has already completed the pilot run of the 40nm 6F² process, where yields have already exceeded expectations, where Elpida initially plans for half of its 130,000 12" wafers per month to be converted and further conversion dependent on market conditions.
As the 40nm 6F2 process technology reduces the chip size, when compared to the current generation of 65nm products, this will effectively reduce relative die costs by 50%. This process is also the most advanced among industry peers, with the smallest die size, producing high performance and low power consumption, mainstream DDR3 products. Elpida also said that the process technology - also depending on certain conditions - will be transferred to its manufacturing partner Powerchip Semiconductor, Winbond, and Promos.
