Broadcom Announces 7nm IP for ASICs in Deep Learning and Networking Applications
Broadcom today announced a silicon-proven 7nm intellectual property (IP) for an ASIC platform targeting deep learning and networking applications.
According to Broadcom, the platform offers "best-in-class IP cores" which include high speed SerDes, HBM PHY, Die2Die PHY, mixed-signal IP, and foundation IP such as standard cells, SRAM, TCAM memory, and I/O cells. The platform is based on TSMC 7nm process technology,
Platform Highlights
- Broad SerDes portfolio including 112G PAM-4, 58G PAM-4, 32G and 16G Gen4 SerDes
- JEDEC compliant HBM Gen2 and HBM Gen3 PHY
- Comprehensive portfolio of Arm cores and peripherals
- Comprehensive single port, multi-port, register file and TCAM memory compilers along with optimized standard cell libraries
- Ultra low power Die2Die PHY enables multi-die integration, logic and I/O disaggregation
The design kit for 7nm ASIC platform is available now, and 7nm ASIC products are scheduled to tape-out in calendar Q4 2017.
