Santa Clara, California based equipment supplier Applied Materials has launched its Endura Volta CVD Cobalt chip making machine, which is capable of encapsulating copper interconnects in logic chips beyond the 28nm node by depositing thin cobalt films. According to the company, this marks the biggest change in the copper interconnect in the last 15 years.

Growth in semiconductors today is driven primarily by mobile applications and this demand continues to increase. Chipmakers continue adding smaller and faster transistors to chips to maintain the pace of Moore's Law, and as a consequence copper wiring is being drastically scaled and densities increased. Today advanced chips can feature up to 15 layers of copper metallization and more than 7 linear miles of wiring embedded in a square-inch 28nm chip layout - a distance that will only increase as transistor density increases and additional metal levels are added. At these dimensions it becomes exceptionally difficult to achieve perfect copper fill in 100% of the trenches and vias that make up the circuitry of a device.
Other performance-degrading effects, such as electro-migration, which can cause movement of copper that leaves voids in the wiring, also become significantly more problematic. The smallest defect can kill a device; interconnect performance and reliability begin to suffer under these conditions. For chipmakers, this means yield issues.

Higher densities at smaller nodes generate several new manufacturing challenges, specifically in the ability to fill narrow geometries and to extract reliable performance from the wires and interconnects.

The Volta system's technology alleviates roadblocks to copper interconnect scaling beyond the 2Xnm node through two enabling applications - a conformal cobalt liner and a selective cobalt capping layer, which together completely encapsulate the copper wiring.

Cobalt is a new material and has several good characteristics. It offers low resistivity and adheres well to copper and barrier layers. Plus, there is flexibility in depositing and tuning this material - making it production friendly.

In the first new process step, CVD cobalt enables the thin, continuous deposition for the liner layer that optimizes the subsequent copper seed layer, driving good plating performance and, ultimately, reliable device performance.

The second cobalt process deposits a selective CVD cobalt capping layer after the chemical mechanical polishing (CMP) step on copper lines to reduce electro-migration. The cap immobilizes the atoms at the surface of the copper, promoting good adhesion of the copper lines to the subsequent dielectric barrier layer.

What Applied Materials has done by enabling the two new process steps - the Volta CVD system's cobalt liner and selective cobalt capping layer - is to demonstrate improved copper gap fill and an order-of-magnitude reduction in electro-migration. These are critical to extending Moore's Law beyond 20 nanometers.