AMD during its keynot showed a prototype CPU that adopted the latest cache mounting technology "3D V-CACHE, and that means stacked. The company announced that it will start production at the end of 2021.
At AMD's keynote they announced "3D V-CACHE," which is the latest technology for CPUs, which stacks SRAM caches on dies . A prototype model based on the Ryzen 9 5900X was unveiled. AMD's CEO Lisa Su showed the prototype of a Ryzen 9 5900X in which the cache was already stacked on a CCD. The 64 MB additional cache takes up a space of 6 mm × 6 mm and would find its place in series on both CCDs. In the end, this is 96 MB L3 cache per CCD, a total of 192 MB for a 12- or 16-core processor.
"3D V-CACHE" adopts the silicon penetration via method, which enables higher density of transistors compared to the conventional method. In addition, problems with thermal characteristics and transistor density can be dramatically improved.
The prototype CPU used in this demo has 64MB of SRAM added to each CCD, and is equipped with a large capacity cache of 96MB per CCD (conventional 32MB + 64MB SRAM) and 192MB per CPU. This improves game performance by an average of 15%, despite the exact same number of cores/threads and operating clock (fixed at 4GHz). Production of the new CPU that uses "3D V-CACHE" is scheduled to begin at the end of 2021.