Toshiba has applied non-volatile memory technology to the development of circuit technology for field-programmable gate arrays (FPGAs), and manufactured devices that are smaller, cost less while maintaining performance and reliability. While custom LSIs are increasingly required to handle diverse applications, advances in the semiconductor process have triggered dramatic increases in development costs that actually make it more difficult to accommodate request for multiple applications. Since processing performance per watt of power consumption for computational processing by software is too low to offer sufficient performance, demand has been increasing for FPGAs, where circuit information can be changed after the chip has been manufactured. However, conventional FPGAs must reserve a large area for the memory cells that store circuit information, which increases the chip cost, and this has created demand for small area, low cost FPGAs.

Toshiba achieved the design advance by unifying the logic circuit and memory cell as a single unit, replacing the logic circuit switches of the FPGA with a high density switch array employing anti-fuse style non-volatile one-time memory elements. This realizes a non-volatile FPGA with a smaller die size. The company also developed a circuit that connects the anti-fuse elements, which require a high voltage in order to write, and the logic circuits, which can operate at a low voltage without any degradation in operation.This reduces use of large high-voltage transistors, a primary factor in increased chip area, and reduce the chip size to approximately half that possible with conventional technology.

The combination of these two advances, along with newly developed software for writing circuit information to non-volatile FPGAs, has allowed Toshiba to increase the integration density of the memory and logic circuits and deliver non-volatile FPGA with a low chip cost.

The new circuit technology delivers the world's smallest circuit area of any FPGA of the same semiconductor generation. Toshiba's investigation has found that the overall size is reduced by approximately half when the areas required for actual functions are estimated. Since the technology is implemented using standard CMOS and can be integrated into custom LSIs, it realizes custom LSIs with circuits that can be finely adjusted for various applications.

Details of the technology were announced on 14 June at the "2016 Symposium on VLSI Technology", an international conference on semiconductor devices in Honolulu, Hawaii.

Toshiba is proceeding with research aiming for practical implementation of this newly developed circuit technology as part of the set of circuits for the custom LSIs of our company for 2017 and beyond.