Toshiba Selects Rambus DDR2 Interface Technology
Rambus announced that Toshiba Corporation has selected its DDR2 interface cells for next-generation high-volume consumer applications.
As part of the agreement, Toshiba will use Rambus's drop-in DDR2 interface cells that have been designed for Toshiba's advanced manufacturing process.
"We have experienced a long and beneficial relationship with Rambus through the years and continue to benefit from Rambus's expertise in high-speed interface design," said Yutaka Murao, semiconductor company assistant to chief technology executive at Toshiba. "As memory interfaces further increase in speed and complexity, we find a greater need for drop-in solutions that are tested, proven, and that integrate seamlessly into our consumer and computing devices. Rambus has the expertise to help us bring our consumer products to market quickly."
Rambus DDR memory controller interfaces are complete macro cells instead of technology building blocks, such as I/O pads and delay lock loops (DLLs) that engineers must assemble, integrate and verify on their own. By incorporating Rambus's drop-in DDR memory controller interface cells into their chip designs, customers can save an estimated six-to-nine months of development time and potentially millions of dollars by avoiding costly chip re-spins and lost revenues from being late to market.
"We have worked very closely with Toshiba on a number of important projects and have developed a broad product offering that fits their needs," said Rich Warmke, product marketing director of the Memory Interface Division at Rambus. "Our goal is to become the one-stop source for all of our customers' challenging interface needs, both in high performance as well as mainstream applications."
Rambus DDR interfaces are designed for a wide variety of standard CMOS processes, such as 65-nanometer, 90-nanometer, 0.13-micron and 0.18-micron. Rambus DDR memory controller interfaces for consumer and graphics applications are available now, and those for main memory applications will be available soon. For more information on Rambus's DDR2 memory interface solutions, visit www.rambus.com/ddr.
"We have experienced a long and beneficial relationship with Rambus through the years and continue to benefit from Rambus's expertise in high-speed interface design," said Yutaka Murao, semiconductor company assistant to chief technology executive at Toshiba. "As memory interfaces further increase in speed and complexity, we find a greater need for drop-in solutions that are tested, proven, and that integrate seamlessly into our consumer and computing devices. Rambus has the expertise to help us bring our consumer products to market quickly."
Rambus DDR memory controller interfaces are complete macro cells instead of technology building blocks, such as I/O pads and delay lock loops (DLLs) that engineers must assemble, integrate and verify on their own. By incorporating Rambus's drop-in DDR memory controller interface cells into their chip designs, customers can save an estimated six-to-nine months of development time and potentially millions of dollars by avoiding costly chip re-spins and lost revenues from being late to market.
"We have worked very closely with Toshiba on a number of important projects and have developed a broad product offering that fits their needs," said Rich Warmke, product marketing director of the Memory Interface Division at Rambus. "Our goal is to become the one-stop source for all of our customers' challenging interface needs, both in high performance as well as mainstream applications."
Rambus DDR interfaces are designed for a wide variety of standard CMOS processes, such as 65-nanometer, 90-nanometer, 0.13-micron and 0.18-micron. Rambus DDR memory controller interfaces for consumer and graphics applications are available now, and those for main memory applications will be available soon. For more information on Rambus's DDR2 memory interface solutions, visit www.rambus.com/ddr.
