Spansion Begins Sampling of 65nm Flash Memory
Spansion has started sampling its MirrorBit Quad devices at 65nm, less than a year after introducing the first four-bit-per-cell Flash memory devices at 90nm.
Production in volume is planned at Spansion's new 300mm SP1 fab in Japan.
MirrorBit Quad devices will initially sample at 1Gb, with additional densities planned. The faster throughput offered by 65nm compared to 90nm allows manufacturers to program content such as audio books, games, movies, music, GPS maps and photo albums more quickly. Similarly, consumers will experience quicker access to programs and multimedia via their cell phones and media players and can enjoy a smoother video display -- at 65nm MirrorBit Quad Flash memory supports video at 30 fps.
MirrorBit Quad technology builds on Spansion's two-bit-per-cell MirrorBit technology, which stores charges in two distinct locations in a proprietary charge-trapping storage medium to deliver fundamental cost and manufacturing advantages over floating-gate technology. By combining MirrorBit technology's two distinct charge regions per cell with four charge levels, MirrorBit Quad technology provides four-bit storage capability in a single memory cell. Due to the increased storage capacity per cell, MirrorBit Quad technology is capable of delivering up to 30 percent smaller effective cell size per bit than floating-gate MLC NAND Flash memory technology at the same process technology node.
MirrorBit Quad devices will initially sample at 1Gb, with additional densities planned. The faster throughput offered by 65nm compared to 90nm allows manufacturers to program content such as audio books, games, movies, music, GPS maps and photo albums more quickly. Similarly, consumers will experience quicker access to programs and multimedia via their cell phones and media players and can enjoy a smoother video display -- at 65nm MirrorBit Quad Flash memory supports video at 30 fps.
MirrorBit Quad technology builds on Spansion's two-bit-per-cell MirrorBit technology, which stores charges in two distinct locations in a proprietary charge-trapping storage medium to deliver fundamental cost and manufacturing advantages over floating-gate technology. By combining MirrorBit technology's two distinct charge regions per cell with four charge levels, MirrorBit Quad technology provides four-bit storage capability in a single memory cell. Due to the increased storage capacity per cell, MirrorBit Quad technology is capable of delivering up to 30 percent smaller effective cell size per bit than floating-gate MLC NAND Flash memory technology at the same process technology node.
