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Friday, February 05, 2016
768 Gbit Micron 3D NAND Is Faster Than Samsung’s 256Gb V-NAND: ISSCC


At this week's International Solid-State Circuits Conference (ISSCC), both Micron and Samsung Electronics presented papers outlining their latest eforts in the NAND flash technology, with Micron's approach to gain more interest.

In a paper entitled "A 768Gb 3b/cell 3D-Floating-Gate NAND Flash Memory, "Micron described a new flash design approach that on paper beats the vertical NAND technology Samsung has been using to lead the non-volatile memory market.

Micron's 768 Gbit 3D NAND device featured control circuits under the flash array to deliver a density of 4.29 Gbits/mm2 compared to 2.6 Gb/mm2 for the most dense 256Gbit 3D NAND chip Samsung ships today.

Samsung has not been using the floating gate technology in its planar flash design. The Korean company has been using a technology called charge trapping in 3-D NAND devices which is in some ways simpler to build.

The Micron chip measures 179.2mm2 compared to 97.6mm2 for the Samsung device. It has much faster read times at 800 Mbytes/s compared to 178 Mbytes/s for Samsung. On the other hand, Samsung's chip is faster in write tasks, at 53 Mbytes/s compared to 44 Mbytes/s for Micron.

A disadvantage of Micron's architecture is that it currently uses relatively large 96 MByte blocks and does not enable a partial block write or erase operation.

Micron has not yet decided whether they will commit to manufacturing the design as a product. it is unclear whether Micron's bold design can yield well.

For its part, Samsung presented at ISSCC a "256Gb 3b/Cell V-NAND Flash Memory with 48 Stacked WL Layers" - it's actually a chip already on the market.

The 48-layer vertical NAND device is Samsung’s third-generation 3D NAND chip with twice the density of its prior 32-layer part.

In theory, the more layers you are able to stack the better the performance will be. But among the challenges making such chips is linking the layers by etching tall holes through them, then filling the holes with interconnect. A relatively large channel hole is easier to make but has poorer word-line resistance.

Currently, Samsung enjoys the lead in the flash market with a 34.1% share followed by Toshiba, SanDisk and Micron in fourth place with a 14.6% share.

Toshiba/Sandisk have also 768 Gbit TLC 3D BiCS on their road map for late 2017 and a 1Tbit chip for 2018.



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