Thursday, March 30, 2017
Search
  
Submit your own News for
inclusion in our Site.
Click here...
Breaking News
Windows 10 Creators Update Coming April 11
Samsung Galaxy S8 and S8+ Are Official, Along With Bixby And New Gear 360
Razer Blade Pro IS The First THX Certified Gaming Laptop
Lenovo Makes Pro Virtual Reality Accessible With the ThinkStation P320
Intel Details 10, 22nm Processes, Proposes Transistor-density Metric
U.S. House Voted Against Broadband Privacy Rules
SK Hynix Offers More Than $9 billion for Toshiba Chip Unit: report
Toshiba's Nuclear Unit Westinghouse Files for Bankruptcy
Active Discussions
Which of these DVD media are the best, most durable?
How to back up a PS2 DL game
Copy a protected DVD?
roxio issues with xp pro
Help make DVDInfoPro better with dvdinfomantis!!!
menu making
Optiarc AD-7260S review
cdrw trouble
 Home > News > PC Parts > Sony, T...
Last 7 Days News : SU MO TU WE TH FR SA All News

Thursday, December 14, 2006
Sony, Toshiba, NEC Electronics Develop 45nm Chip Platform


Sony, Toshiba and NEC Electronics Corp., said on Thursday they had jointly developed technology to mass produce cutting-edge chips.

The platform developed by the three Japanese companies will be used to make system chips, which combine multiple functions on a sliver of silicon, using 45-nanometre technology, the firms said in a joint press release. This technology was unveiled on December 13 (US Pacific Standard Time) at Session 27.2 of the 2006 International Electron Devices Meeting (IEDM) in San Francisco, CA.

Chip makers worldwide are locked in a race to lower production costs on 90-, 65- and 45-nanometre chips, with the smaller circuitry widths allowing more power per chip for complex devices.

The three companies are developing a platform for low-power system chips, to be completed in early 2007.

Toshiba and NEC Electronics are also working to standardize technology to make advanced chips with circuitry width of 45-nanometres or finer with Fujitsu and Renesas Technology Corp.

The key elements of the new platform are a fully renovated MOSFET integration scheme, and a hybrid structure with a low dielectric constant (low-k) film that assures high performance and reliability.

The MOSFET integration process applies strained silicon technology to the transistor, utilizing crystal lattice distortion to induce performance-boosting local strain at key locations. Optimization of the strain boosts transistor performance to a level 30% faster than that achieved in the present generation of technology.

Application of a low-k film in the intermediate metal layer of the chip during the back-end process reduces parasitic capacitance and improves circuit performance. The three partners confirmed a dielectric gate film with an effective 15-year lifetime, a span surpassing the average lifetime of a high performance LSI. They also carried out tests of the platform and proved a layer yield of over 98% for the challenging back-end process, confirming that the technology achieves the reliability essential for mass production.

In addition, the partners have led the industry in applying immersion lithography technology with an ultra-high numerical aperture (NA) of over 1.0 to formation of the transistor node, achieving a cell with an area of 0.248 micron m2 in an ultra high density SRAM. The new cell is the smallest yet achieved.

The three companies are simultaneously developing two 45nm processes -- the current platform, which is ideal for high performance LSIs, as well as a platform for applications with low power consumption requirements, which is expected to be completed in early 2007.


Previous
Next
DaTARIUS DaTABANK Reads BD-ROM Mark        All News        ATI Releases Catalyst 6.12 Drivers
NXP Semiconductors Introduced Two PC TV Processors     PC Parts News      BenQ to Debut Full Line of 2007 Widescreen LCD Monitors for Gamers

Get RSS feed Easy Print E-Mail this Message

Related News
Toshiba's Nuclear Unit Westinghouse Files for Bankruptcy
TAG Heuer Connected Modular 45 Smartwatch Costs $1,600, Has An Intel Mobile Chip Inside
Toshiba Delays Earnings Report, Announces Recovery Plan
Toshiba Informs SK hynix of New Plan to Sell Memory Business
Foxconn Is Bidding for Toshiba Chip Business
MWC: Sony Adds Four New Photo-centric Smartphones To X-series
Toshiba Starts Sampling 64-Layer, 512-gigabit 3D Flash Memory
Toshiba Books $6.3 Billion Writedown, Chairman Resigns
Sony Unveils Pricing And Availability Of 2017 4K HDR Ultra HD TVs And Ultra HD Blu-ray Player
Toshiba Starts Construction of Fab 6 at Yokkaichi, Japan
Toshiba Announces First MN Series HDDs
Sony Develops the First 3-Layer Stacked CMOS Image Sensor with DRAM for Smartphones

Most Popular News
 
Home | News | All News | Reviews | Articles | Guides | Download | Expert Area | Forum | Site Info
Site best viewed at 1024x768+ - CDRINFO.COM 1998-2017 - All rights reserved -
Privacy policy - Contact Us .