Toshiba and Sony today announced the development of essential technologies for system LSI based on next-generation 45-nanometer process technology.
The advances cover the development of carrier mobility enhancement technologies and wiring process technology for boosting LSI performance.
Toshiba and Sony have raised current drive performance in transistors by developing strained silicon technologies that enhance carrier mobility. They have also developed a performance-enhancing low dielectric constant (low-k) film technology for implementation between layers in multi-layer wiring.
Two advances in strained silicon technologies improve individual transistor performance and overall device performance. The first optimizes the thickness of a stress liner covering the transistor and improves current drive performance by approximately 40%. The second brings global stress into the device substrate in a low cost process that realizes an approximately 20% improvement of current drive performance.
In seeking improved low-k film technology, Toshiba and Sony enhanced the quality of the low-k film by appropriately allocating dummy wiring to improve removal of moisture from the film. In doing so, they overcame the problem of poor drain characteristics in low-k film.
In 45nm generation system LSI, miniaturization of circuitry is no guarantee of performance improvement. Miniaturization must be accompanied by performance enhancement technologies, including utilization of new materials and structures. In following this approach, Toshiba and Sony have clarified conditions for applying innovative support technologies to actual products.
Toshiba and Sony announced details of the technologies at the International Electron Devices Meeting (IEDM), which runs in Washington D.C. from December 5 to December 7.
For more information read the official press release