The Heterogeneous System Architecture (HSA) Foundation today released the HSA 1.1 specification, enhancing the ability to integrate open and proprietary IP blocks in heterogeneous designs. The new specification is the first to define the interfaces that enable IP blocks from different vendors to communicate, interoperate and collectively compose an HSA system.

HSA is a standardized platform design supported by more than 40 technology companies and 17 universities that unlocks the performance and power efficiency of the parallel computing engines found in most modern electronic devices. It allows developers to apply the hardware resources-including CPUs, GPUs, DSPs, FPGAs, fabrics and fixed function accelerators - in today’s systems-on-chip (SoCs).

With the introduction of multi-vendor architecture support and a range of other functional enhancements, HSA specification 1.1 advances the Foundation’s goal of bringing true heterogeneous computing to platforms including vision based IoT systems, mobile devices, desktops, high-performance computing (HPC) systems, AR/VR environments, and servers.

HSA Specification 1.0, introduced in March 2015, marked a breakthrough by defining a method for delivering highly integrated systems abstracting away specific processor complexities in heterogeneous designs.

In addition to multi-vendor support, key features of the new 1.1 specification include:

• More efficient interoperation: Improved interoperation with graphics, cameras and other image processors, digital signal processors; and more efficient interoperation with non-HSA compliant devices
• A strict, formal definition of the HSA memory model which allows for well-defined language support that is at the forefront of the industry
• Heterogeneous system-level profiling capabilities with support for an architected event/timestamp model and performance evaluation enabling users to access hardware information for profile guided optimizations or analysis of user code in any language
• Quality of Service (QoS) improvements with better defined forward progress requirements
• Several run-time enhancements including the capability to wait on multiple signals
• Non-temporal memory access that allows infrequently used values to be removed from a cache efficiently
• A new open source LLDB-based debugger sponsored by Codeplay supporting kernels compiled using the open source CLOC compiler and the HSA assembler. All are available on the Foundation’s GitHub repository.
• High-level debug information being provided in an updated Finalizer code object
• Finalizer version support for specific application libraries