NEC to Begin 40nm Manufacturing
NEC Electronics today announced plans for the production of semiconductor devices utilizing 40-nanometer process technology at NEC Yamagata, its manufacturing subsidiary in Tsuruoka, Japan.
The company is investing 10 billion yen this fiscal year (ending March 31, 2008) toward the purchase of an immersion lithography system and other equipment that will enable manufacturing of 55-nanometer and 40-nanometer devices. The equipment will be installed at the 300-millimeter wafer production line at NEC Yamagata.
NEC Yamagata began sample shipment of 55-nanometer devices in October 2007, and volume production of 40-nanometer devices is scheduled to begin by the end of the next fiscal year. The first products to be manufactured using the new 40-nanometer technology are expected to be advanced system LSI chips and ASICs with embedded memory (eDRAM) for consumer electronics, mobile handsets, and game consoles.
Since the launch of 300-millimeter wafer production at NEC Yamagata in January 2005, NEC Electronics has invested 140 billion yen to date for 130-nanometer, 90-nanometer, and 55-nanometer manufacturing at the site. The company has also introduced the use of several low power technologies, such as high-k metal gate stacks, which have helped achieve significant reductions in power consumption and earned high marks from customers.
The additional 10 billion yen investment this fiscal year to upgrade NEC Yamagata's 300mm line will allow production of up to 5,000 wafers per month using 55-nanometer technology, of which approximately 2,000 wafers per month can be adapted for 40-nanometer technology. NEC Yamagata's total manufacturing capacity, which currently stands at approximately 13,000 wafers per month, will remain unchanged, and the facility will continue to support 130-nanometer and 90-nanometer production.
NEC Yamagata began sample shipment of 55-nanometer devices in October 2007, and volume production of 40-nanometer devices is scheduled to begin by the end of the next fiscal year. The first products to be manufactured using the new 40-nanometer technology are expected to be advanced system LSI chips and ASICs with embedded memory (eDRAM) for consumer electronics, mobile handsets, and game consoles.
Since the launch of 300-millimeter wafer production at NEC Yamagata in January 2005, NEC Electronics has invested 140 billion yen to date for 130-nanometer, 90-nanometer, and 55-nanometer manufacturing at the site. The company has also introduced the use of several low power technologies, such as high-k metal gate stacks, which have helped achieve significant reductions in power consumption and earned high marks from customers.
The additional 10 billion yen investment this fiscal year to upgrade NEC Yamagata's 300mm line will allow production of up to 5,000 wafers per month using 55-nanometer technology, of which approximately 2,000 wafers per month can be adapted for 40-nanometer technology. NEC Yamagata's total manufacturing capacity, which currently stands at approximately 13,000 wafers per month, will remain unchanged, and the facility will continue to support 130-nanometer and 90-nanometer production.
