Researchers at MIT's Research Laboratory of Electronics (RLE) highlight the future of chip manufacturing by making the e-beam lithography, commonly used to prototype computer chips, more practical as a mass-production technique.
For 50 years, the transistors on computer chips have been getting smaller, and
for 50 years, manufacturers have used the same technique - photolithography - to
make their chips. But the very wavelength of visible light limits the size of
the transistors that photolithography can produce. If chipmakers are to keep
shrinking chip features, they'll probably need to turn to other manufacturing
methods.
Researchers have long used a technique called electron-beam (or e-beam)
lithography to make prototype chips, but standard e-beam lithography is much
slower than photolithography. Increasing its speed generally comes at the
expense of resolution: Previously, the smallest chip features that high-speed
e-beams could resolve were 25 nanometers across, barely better than the
experimental 32-nanometer photolithography systems that several manufacturers
have demonstrated. In a forthcoming issue of the journal Microelectronic
Engineering, however, researchers at MIT?s Research Laboratory of Electronics
(RLE) present a way to get the resolution of high-speed e-beam lithography down
to just nine nanometers. Combined with other emerging technologies, it could
point the way toward making e-beam lithography practical as a mass-production
technique.
The most intuitive way for manufacturers to keep shrinking chip features is to
switch to shorter wavelengths of light - what's known in the industry as extreme
ultraviolet. But that's easier said than done. "Because the wavelength is so
small, the optics [are] all different," says Vitor Manfrinato, an RLE graduate
student and first author on the new paper "So the systems are much more
complicated &hellip [and] the light source is very inefficient."
Visible-light, ultraviolet and e-beam lithography all use the same general
approach. The materials that compose a chip are deposited in layers. Every time
a new layer is laid down, it?s covered with a material called a resist. Much
like a piece of photographic paper, the resist is exposed - to either light or a
beam of electrons - in a carefully prescribed pattern. The unexposed resist and
the material underneath are then etched away, while the exposed resist protects
the material it covers. Repeating this process gradually builds up
three-dimensional structures on the chip's surface.
The main difference between e-beam lithography and photolithography is the
exposure phase. In photolithography, light shines through a patterned stencil
called a mask, striking the whole surface of the chip at once. With e-beam
lithography, on the other hand, a beam of electrons scans across the surface of
the resist, row by row, a more time-consuming operation.
One way to improve the efficiency of e-beam lithography is to use multiple
electron beams at once, but there?s still the problem of how long a beam has to
remain trained on each spot on the surface of the resist. That's the problem the
MIT researchers address.
The fewer electrons it takes to expose a spot on the resist, the faster the
e-beam can move. But lowering the electron count means lowering the energy of
the beam, and low-energy electrons tend to "scatter" more than high-energy
electrons as they pass through the resist, spreading farther apart the deeper
they go. To reduce scattering, e-beam systems generally use high-energy beams,
but that requires resists tailored to larger doses of electrons.
Manfrinato, a member of RLE?s Quantum Nanostructures and Nanofabrication Group,
and group leader Karl Berggren, the Emanuel E. Landsman (1958) Associate
Professor of Electrical Engineering and Computer Science - together with
professor of electrical engineering Henry Smith, graduate students Lin Lee
Cheong and Donald Winston, and visiting student Huigao Duan, all of RLE - used
two tricks to improve the resolution of high-speed e-beam lithography. The first
was to use a thinner resist layer, to minimize electron scattering. The second
was to use a solution containing ordinary table salt to "develop" the resist,
hardening the regions that received slightly more electrons but not those that
received slightly less.
Pieter Kruit, a professor of physics at the Delft University of Technology in
the Netherlands and co-founder of Mapper, a company that has built lithographic
systems with 110 parallel e-beams, says that in addition to being faster, e-beam
systems that deliver smaller doses of electrons are much easier to build. The
larger the dose of electrons, the more energy the system consumes, and the more
insulation it requires between electrodes. "That takes so much space that it?s
impossible to build an instrument," Kruit says.
Kruit doubts manufacturers will use exactly the resist that the MIT researchers
did in their experiments. Although the researchers' goal was to find a resist
that would respond to small doses of electrons, the one that they settled on is
actually "a little bit too sensitive," Kruit says: The amount of electricity
that an electrode delivers to a chip surface will vary slightly, he explains,
and if the resist is too sensitive to those variations, the width of the chip
features will vary, too. "But that is a matter of modifying the resist slightly,
and that?s what resist companies do all the time," he adds.