Intel and Samsung presented papers at the International Solid-State Circuits Conference (ISSCC) describing their work on 10-nm SRAM and 7-nm SRAm, respectively, with Samsung's 256-Mbit SRAM to be made with extreme ultraviolet lithography.
Intel says it maintained Moore's law scaling with a 0.0312-mm2 high density and 0.0367-mm2 low-voltage SRAM bitcells made in its 10-nm process.
On the other hand, Samsung's 6T 256-Mbit device has a smaller, 0.026-mm2 bitcell.
Intel's Zheng Gui said that his company's design shows 0.62x0.58x scaling compared to its 14-nm SRAM, which is within 15 percent of the smallest reported 7-nm cell.
Samsung detailed techniques to reduce by 75 percent bitline resistance, one of the biggest challenges for the design. The company also described techniques to reduce by about 20 percent problems with variation in minimum voltage levels. Taejoong Song, a vice president in design enablement at Samsung, said that EUV enables more design flexibility in the number of vias used.
It is not clear when Samsung plans to commercially use of EUV.
TSMC presented an L1 cache compiler now available for its 7-nm process that can operate at data rates up to at least 4.4 GHz. Its 16-nm L1 memories topped out at about 3 GHz.