Saturday, February 24, 2018
Search
  
Submit your own News for
inclusion in our Site.
Click here...
Breaking News
IBM Researchers Talk About the Future of EUV at SPIE
Xiaomi and Microsoft Expand Their Collaboration in cloud, Devices and AI Areas
Google's Augmented Reality SDK ARCore 1.0 Released, Google Lens Updated
Google Assistant is Going Global
TEAC Releases New Reference Series Hi-Res Audio Models
First Affordable Android Go Smartphones Coming Next Week
Samsung Breaks Ground on New EUV Line in Hwaseong
Samsung Max Android Application Offering Mobile Data Saving Mode and Privacy
Active Discussions
Which of these DVD media are the best, most durable?
How to back up a PS2 DL game
Copy a protected DVD?
roxio issues with xp pro
Help make DVDInfoPro better with dvdinfomantis!!!
menu making
Optiarc AD-7260S review
cdrw trouble
 Home > News > Mobiles > Toshiba...
Last 7 Days News : SU MO TU WE TH FR SA All News

Friday, February 22, 2013
Toshiba Develops Low Power Technology for Embedded SRAM


Toshiba has developed an innovative low-power technology for embedded SRAM for application in smart phones and other mobile products.

The new technology reduces active and standby power in temperatures ranging from room temperature (RT) to high temperature (HT) by using a bit line power calculator (BLPC) and a digitally controllable retention circuit (DCRC). A prototype has been confirmed to reduce active and standby power consumption at 25C by 27% and 85%, respectively.

Typically, longer battery life requires lower power consumption in both high performance and low performance modes (MP3 decoding, background processing, etc.). As low performance applications require only tens of MHz operation, SRAM temperature remains around RT, where active and leakage power consumptions are comparable. Given this, the key issue is to reduce active and standby power from HT to RT.

Toshiba's new technology applies a BLPC and DCRC. The BLPC predicts power consumption of bit lines by using replicated bit lines to monitor the frequency of the ring oscillator. It minimizes the active power of the SRAM in certain conditions by monitoring the current consumption of the SRAM rest circuits. The DCRC decreases standby power in the retention circuit by periodically activating itself to update the size of the buffer of the retention driver.

Toshiba presented this development at the 2013 IEEE International Solid-State Circuit Conference in San Francisco, CA on February 20.


Previous
Next
PayPal Brings Mobile Payments To Europe        All News        OCZ Bundles Far Cry 3 PC Game With Its Vector SSD Series
Mobile World Congress Kicks Off On Monday     Mobiles News      Next LG Optimus G II To Use ARM-based Chips Developed In-house

Get RSS feed Easy Print E-Mail this Message

Related News
Toshiba Reveals Fresh Canvio Portable Hard Drive Models
Toshiba Officially Unveils Mainstream RC100 NVMe SSD Series
Struggling Toshiba Sells Westinghouse to Brookfield
Toshiba Introduces the Symbio Smart Home Solution With Alexa Support
Toshiba to Unveil New RC100 NVMe and Portable XS700 SSDs at CES 2018
Toshiba to Prepare New Semiconductor Fabrication Facility
Toshiba Introduces New AL15SE 10,500rpm Enterprise Performance HDD
Toshiba and Western Digital Reach Settlement, Agree to Strengthen Flash Memory Collaboration
Toshiba and Western Digital Close to Agreement Over Memory Chip Sale
Toshiba Moving Closer to Deal With Western Digital
Toshiba Launches First 14TB HDD with Conventional Magnetic Recording
Toshiba Releases 10TB NAS-Class Hard Drive

Most Popular News
 
Home | News | All News | Reviews | Articles | Guides | Download | Expert Area | Forum | Site Info
Site best viewed at 1024x768+ - CDRINFO.COM 1998-2018 - All rights reserved -
Privacy policy - Contact Us .