Ultra160 SCSI - Page 2
- Double Transition Clocking
Double transition clocking changes the digital
protocol to use both edges of the SCSI request/acknowledge signal to clock data.
Data transfer rates can be doubled simply by increasing the speed of only the
data lines. For example, request/acknowledge signal on Ultra2 SCSI runs at 80
MHz, while data runs at only 40 MHz, or 80 MB/second on a 16-bit wide bus. By
using both edges of the same 80 MHz request/acknowledge signal, the data rate
can be increased to 80 MHz, or 160 MB/second on a 16-bit wide bus.
- Choosing the Speed Advantage with Double Transition Clocking
Double Transition Clocking doubles the Ultra2 SCSI data transfer
rates from 80 MB/second to 160 MB/second. Interface bandwidth is an essential
ingredient for Windows NT and UNIX workstations, video and web servers, and
storage area networks (SANs).
Figure 1. Double Edge Clocking ? Increasing Speed
- Choosing the Reliability Advantage with Double Transition
For a given transfer rate Double Transition Clocking keeps
the maximum clock rate at half the rate of single edge clocking (see Figure
2). This provides more timing margin for ASICs, cables, motherboard traces,
high capacitance devices, extra connectors, etc. Longer pulses reduce the likelihood
of problems by increasing timing margins and tolerance to noise. Double Transition
Clocking reduces the maximum frequency of the clock lines (REQ/ACK) without
slowing the data rate. Slower clocks should also reduce EMI issues for system
Figure 2. Double Edge Clocking - Increasing