A dual-core ARM Cortex-A9 processor manufactured on GLOBALFOUNDRIES' 14nm-XM technology will deliver more than twice the energy efficiency of a similar 28nm-SLP technology based design, while requiring only half the chip area, GLOBALFOUNDRIES claims.
The announcement was made at today's Common Platform Technology Forum, where GLOBALFOUNDRIES announced results from an implementation of a dual-core ARM Cortex-A9 processor using three-dimensional 14nm-XM FinFET transistors.
GLOBALFOUNDRIES' 14 nm-XM offering is based on a modular technology architecture that uses a 14nm FinFET device combined with elements of GLOBALFOUNDRIES' 20 nm-LPM process, which is on its way to production. The XM stands for "eXtreme Mobility," and it is a non-planar architecture optimized for mobile system-on-chip (SoC) designs.
The foundry calculated the energy-efficiency of a dual-core ARM Cortex-A9 processor manufactured on its 14nm-XM technology using the industry standard design implementation flows and sign-off simulations using real process data.
GLOBALFOUNDRIES used technical specifications from its 14nm-XM process design kit (PDK) combined with ARM Artisan standard-cell libraries and memories to release a Graphic Database System (GDS) file that has been used to calculate expected performance, power and area metrics. The results were compared to a silicon implementation of a dual-core ARM Cortex-A9 processor manufactured on GLOBALFOUNDRIES' 28nm-SLP technology.
ARM processors implemented on 28nm-SLP typically use 12-track libraries. However, GLOBALFOUNDRIES claims that at 14nm-XM FinFET technology, much higher performance and more energy-efficient ARM processors can be implemented using 9-track libraries resulting in further die-size reductions.
The new 14nm chips will also be faster. At constant power, the frequency achieved with 14nm-XM technology based implementation (using 9-track libraries) is expected to be 61% faster than the frequency achieved with 28nm-SLP technology based implementation (using 12-track libraries).
At constant frequency, GLOBALFOUNDIRES expects the power consumed by 14nm-XM technology based implementation to be 62% lower than the power consumed by 28nm-SLP technology based implementation.
Finally, the company anticipates that the performance-power efficiency of 14nm-XM technology based implementation (expressed as DMIPs/milliwatts) to be more than twice that of the 28nm-SLP technology based implementation, while using half the silicon area.
Globalfoundries is racing with Samsung to get their first 14 nm production wafers out before the end of the year, and both are aiming to beat rival Taiwan Semiconductor Manufacturing Co. by as much as a year. Meanwhile, IBM is waiting for the first reliable ultraviolet (EUV) lithography machines to appear.
Samsung will run 14 nm test shuttles for select customers in April and September. It has 14 nm IP partnerships with ARM, Synopsys and Analog Bits. amsung readies two 14 nm shuttles this year with hopes for production wafers before January.
Both Samsung and GLOBALFOUNDRIES expect EUV will not be ready until the 7-nm node.
EUV is also expected to gate the move to 450 mm wafers, now expected about 2020.
GLOBALFOUNDRIES has partnered with Synopsys, Inc. to deliver a design solution to accelerate the implementation of the 14 nm-XM FinFET offering. The solution includes Synopsys' DesignWare Embedded Memory and Logic Library IP; design tools from the Galaxy Implementation Platform; and TCAD process and device simulation tools.
FinFET transistors are a significant change from planar devices. GLOBALFOUNDRIES collaborated with Synopsys on TCAD to model and simulate the changes and to speed up the process development and performance optimization of its FinFET devices. In addition, these devices and the associated shrinking of process geometry at 14nm impact parasitic extraction, SPICE modeling of the devices, routing rules, and IP development. GLOBALFOUNDRIES and Synopsys collaborated to minimize the impact of these changes and ensure smooth adoption of FinFET technology by design teams.
GLOBALFOUNDRIES will also work with Rambus Inc. for the development of complex semiconductor intellectual property (IP) optimized for GLOBALFOUNDRIES' process technology. This collaboration will enable integration of Rambus' standard interface solutions into the next generation of electronics for faster time-to-market. Rambus will develop a range of high-speed memory and chip-to-chip serial link interfaces optimized for GLOBALFOUNDRIES processes, including the new 14nm-XM technology. Previously, the two companies had collaborated on several 28nm test chips.
At the same event, GLOBALFOUNDRIES announced plans to develop 28nm low-power ARM Cortex-A15 processors using the resonant clock mesh (RCM) technology provided by Cyclos Semiconductor.
Cyclos RCM IP is a technology that reduces the power consumed in clock meshes, the clock distribution networks that have been used in high-performance processors for years. Cyclos employs on-chip inductors to create an electric pendulum, or "tank circuit," formed by the large capacitance of the clock mesh and the Cyclos inductors. The Cyclos inductors and clock control circuits "recycle" clock power instead of dissipating it on every clock cycle like in a conventional clock network implementation, which results in a reduction in total IC power consumption.
GLOBALFOUNDRIES also today announced a partnership with Adapteva to offer the company's Epiphany IV microarchitecture to customers using GLOBALFOUNDRIES' 28nm-SLP process technology.
Adapteva, a privately-held semiconductor technology startup, collaborated with GLOBALFOUNDRIES to optimize the Epiphany IV design based on the 28nm Super Low Power (SLP) process, allowing Adapteva to become the first company to demonstrate a processor operating at 50 GFLOPS/Watt.
GLOBALFOUNDRIES' 28nm-SLP technology is suited for the next generation of smart mobile devices. The technology is based on GLOBALFOUNDRIES' "Gate First" approach to High-k Metal Gate (HKMG), which has been in volume production for more than two years.
The Epiphany IV microarchitecture is Adapteva's latest design, including 64 high-performance RISC cores operating at up to 800MHz while consuming less than two watts with maximum program activity. The technology is designed for use as low-cost and low-power co-processor for running massively parallel tasks in conjunction with an ARM or x86 CPU.