IBM today announced a new chip-making technology that can be
used to create advanced semiconductors that can keep pace with
the exploding number of internet-connected devices and the
tidal wave of data they are generating.
The Cu-32 Custom Logic offering employs IBM technology --
designed by IBM Research -- to increase the memory capacity
and processing speeds of chips used in fiber-optic and wireless
networks, and in such gear as routers and switches. The
technology can help manufacturers and network operators handle
the data deluge driven by consumers' appetites for smart phones
and other Web-connected devices.
Systems using chips made with Cu-32 for example, can result in:
* Cellular infrastructure that can move one year's worth of
text messages (six trillion, worldwide in 2010) in less than
ten seconds;
* A consumer downloading a feature-length film on a smart
phone in less than ten seconds; or a HD version in under a
minute;
* Routers that can stream every motion picture ever
produced in less than one minute;
Embedded Memory, Made in IBM Labs, Key to Breakthrough
Performance
IBM's embedded DRAM technology provides the most dense on-chip
dynamic memory available today, enabling more than 1Gb of
memory on a single chip. IBM eDRAM performance has advanced to
a point where it can replace conventional on-chip static memory
(SRAM) in many applications, taking up 60% less space on the
chip, and consuming up to 90% less power.
"IBM's Cu-32 technology with ARM advanced physical IP enables
chip-makers to get powerful system-on-a-chip solutions quickly
to market," said Simon Segars, executive vice president and
general manager, ARM physical IP division. "Our collaboration
with IBM allows both companies to advance the state-of-the-art
in the low-power embedded semiconductors that will help create
next-generation networks."
A suite of new high-sped serial cores (HSS) give Cu-32 advanced
capabilities to network with more than a dozen different
interface standards. Additionally, IBM's silicon-on-insulator
(SOI) process helps improve energy efficiency in chips using
Cu-32. Since its invention by IBM in 1998, more than 100
million SOI chips have been shipped, powering the newest
generation of video games and enabling a wide range of enhanced
communications applications. More than twenty of the world's
leading semiconductor makers, tool makers and industry
suppliers are members of the SOI Industry Consortium, setting
the course of future SOI innovation.
Technical Features of Cu-32 Design Kit
IBM's High Speed Serial (HSS) cores were developed to provide
leading jitter performance and equalization support for
enhanced system performance with the lowest possible bit error
ratio. IBM is an active member of the Optical Internetworking
Forum committee and is leading the effort to define interface
standards for networking communication applications.
- Cu-32 offers the industry's first set of HSS cores in 32nm
SOI technology including:
o 15G Backplane core supporting 16G Fibre Channel
standard
o 15G Chip-to-Chip core supporting low-power optical
and chip-to-chip applications
o 28G Backplane core supporting 32G Fibre Channel
standard
o 6G standards core supporting PCI-Express Gen1 &
Gen2 standards
o PCI-Express Gen3 core supporting PCI-Express Gen1,
Gen2, and Gen3 standards
IBM, as the first provider of eDRAM technology in a
custom-logic design system continues to expand its eDRAM
offering with a compiler that can create more than 3,000
configurations. This flexibility enables smarter silicon
solutions with memory optimized for a wide range of
applications from high-end servers and networking applications
to game processors.
- IBM's eDRAM offering features the fastest and densest eDRAM
memory in the industry, achieving up to 600 MHz of random cycle
performance while using up to ten times less standby power than
conventional SRAM.
- IBM's trench-based eDRAM technology is optimized to deliver
high performance and low power, while avoiding many of the
process complexities of alternative MIM-cap-based eDRAM cells.
IBM's high-k metal gate (HKMG) SOI technology can provide up to
25% chip performance improvement, up to 30% improved energy
efficiency with up to twice the density compared to 45 nm SOI
technology, allowing chips built with the Cu-32 process to
address an ever wider range of devices and applications.
Design kits for standard cell libraries, memory compilers,
eDRAM and supporting Fibre Channel HSS standards are available
now with additional HSS standards availabilities slated for end
of 2010. IBM's accreditation as a Trusted Supplier enables
government sponsored program access to Cu-32 offering.
For further information about Cu-32 and IBM Microelectronics
Division, visit http://www.ibm.com/chips/