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Rambus, a technology licensing company specializing in high-speed memory architectures, today announced it has acquired a number of patents from Inapac Technology, Inc. to broaden its offerings for the mobile memory market.

These patented innovations complement the high-bandwidth, low-power memory technologies developed by Rambus as part of its Mobile Memory Initiative, announced earlier this year. Specific terms of the deal were not disclosed.

These newly acquired patented innovations are key enablers for achieving high manufacturing yields in System-in-Package (SiP) implementations. SiP consists of a number of stacked integrated circuits (IC) - such as a media processor, DRAM, and Flash memory device - enclosed in a single package or module. Given its performance characteristics, SiP has applicability in computing and consumer electronics products as well.

"These patented innovations, which have been proven in shipments in over 90M DRAM devices in SiP implementations, broaden our portfolio for the mobile market," said Herb Gebhart, vice president of Strategic Development at Rambus. "Combined with our high-performance, power-efficient memory technology, we offer compelling solutions that will help our licensees develop a new generation of breakthrough mobile products."

Known to the industry as SiPFLOW, the acquired patented innovations increase the assembly yield in SiP devices. Industry-leading reliability rates of less than 100 defective parts per million (DPPM) have been achieved in high-volume SiP containing a DRAM and media processor. Products including the Motorola RAZR V3i and the Sony Ericsson C902 mobile phones have used these patented innovations through separate technology license agreements with Inapac.

Rambus' Mobile Memory Initiative focuses on the development of high-performance, low-power memory solutions for smartphones, netbooks, portable gaming, and portable multimedia products. Rambus has demonstrated in silicon data rates of 4.3Gbps at best-in-class power efficiency. With this performance, designers could realize more than 17Gigabytes per second of memory bandwidth from a single mobile DRAM device.