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Appeared on: Thursday, April 6, 2006
IBM Previews New Energy Efficient Chip Design

Rapport Incorporated and IBM previewed a energy-efficient processor design, which will feature 1,024 eight-bit processing elements together with a PowerPC core on a single chip, at the Embedded Systems Conference held on Thusday in California.

Rapport and IBM are collaborating to utilize Power Architecture technology to provide high-performance processing with very low energy consumption. The companies believe that isthe design will be one of the most energy-efficient processor designs of its kind.

Based on Rapport's Kilocore technology and IBM's Power Architecture technology, Rapport's next-generation Kilocore1025 chip will process information at higher speeds and orders of magnitude lower power than existing processors.

Rapport's current offering, the KC256, features 256 processing elements, provides more than 25 gigabyte operations/second at well under a single watt of power, and is available with tools and a development platform.

Kilocore-based processors address the shortcomings of conventional chips by putting hundreds or thousands of parallel processing elements together on small chips. These chips feature a dynamic architecture and can be dynamically reconfigured for compute-intensive applications, including mobile gaming, homeland security, server components, image processing, consumer electronics and suitcase supercomputing.

For example, with the Kilocore1025, a user will be able to view streaming live- and high-definition video on a low-power, mobile device at five to 10 times the speed of existing processors.


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