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Appeared on: Thursday, December 08, 2005
New Chip Materials Extend Moore's Law

Chip makers are currently focusing on new metrails other than silicon, that will allow their chips to operate faster and they will consume less energy. Intel said that it has developed a new, low power prototype transistor using new materials that could form the basis of its microprocessors.

Intel and QinetiQ researchers have jointly demonstrated an enhancement-mode transistor using indium antimonide (chemical symbol: InSb) to conduct electrical current. Transistors control the flow of information/electrical current inside a chip. According to Intel, the prototype transistor is much faster and consumes less power than previously announced transistors. Intel anticipates using this new material to complement silicon, further extending Moore's Law.

Significant power reduction at the transistor level, accompanied by a substantial performance increase, could play a crucial role in delivering future platforms to computer users by allowing an increased number of features and capabilities.

"The results of this research reinforce our confidence in being able to continue to follow Moore?s Law beyond 2015," said Ken David, director of components research for Intel's Technology and Manufacturing Group. moore's law claims that transistor counts within a specific area will double within 18 to 24 months.

InSb is in a class of materials called III-V compound semiconductors which are in use today for a variety of discrete and small scale integrated devices such as radio-frequency amplifiers, microwave devices and semiconductor lasers.

The prototype transistors being announced Wednesday had a gate length of 85nm. Note that today's mass-produced transistors have typically a gate length of 50 nm in a 90 nm production process. The 65 nm chip generation, which will debut early January, will reduce the transistor gate length to 35 nm. Intel's prototype transistors are able to operate at a reduced voltage, about 0.5 volts - roughly half of that for transistors in today?s chips.

Details will be provided at the IEDM conference Dec. 5-7, in Washington, D.C., where the formal paper describing this advancement will be delivered.


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