Sun, Fujitsu, IBM and Intel are racing to squeeze as much performance as possible out of their high-end server processors. The companies plan to release multi-core chips in 2008.
Fujitsu's has revealed plans for its upcoming Sparc64 VI+ processor, code-named Jupiter, due for release in 2008. The chip is a four-core processor with clock speeds of at least 2.7GHz.
The chip will be built with a Fujitsu manufacturing process that permits features as small as 65 nanometers. Even so, it will be relatively large; about 460 square millimeters in surface area.
Fujitu's Sparc64 family is a respected processor family, with good performance and reliability features drawn from the company's mainframe experience, but it hasn't been widely used outside Fujitsu's core market in Japan. That changed in 2004, when Fujitsu formed a partnership with Sun Microsystems. Sun scrapped its own UltraSparc V and moved to a jointly designed server line, called Advanced Processor Line, or APL, that uses Fujitsu's Sparc64 chips. The APL partnership starts in late 2006 with Fujitsu's Sparc64 VI, a dual-core processor code-named Olympus.
Intel also plans to release multi-core chips for servers by the end of 2006. The company believes that the 85% of its servers will be using a multi-core (dual-core included) processor, by 2007. Intel claims that its new chips will offer a higher performance x10, compared to its current server solutions (Paxville, etc), by applying specific enhancements in the memory utilization as well as by enabling more efficient linking among the treads.
Unlike to the Intel's new chips, Fujitsu's Sparc64 VI+ (4-core) CPUs will use the bus to connect to the rest of the system, meaning that the newer chip will plug into the older systems.
As with the Sparc64 VI, each core of the VI+ can execute two simultaneous threads. One event that can cause the chip to switch from its first thread to its second is when the first runs into a "cache miss"--in other words, when the chip has to wait because high-speed cache memory doesn't have the information the chip needs and must retrieve it from slower main memory.
Fujitsu calls its threading technology VMT, or vertical multithreading.
The Sparc64 VI will be able to execute four threads, and the VI+ eight. The chip family's future direction will include both multicore and multithread directions.
The 423-square-millimeter Sparc64VI will consume about 120 watts of power, he said. He didn't absolutely promise that the VI+ will consume the same amount--a requirement to be able to drop the new chip into older systems.
Sun also has three major chip designs of its own in development, all of which place an emphasis on many cores and threads. "Niagara," due by early 2006, is an eight-core, 32-thread chip geared for network-oriented tasks such as hosting Web sites. Its forthcoming sequel, Niagara II, will add multiprocessor abilities and better hardware acceleration of some software functions.
Finally, the "Rock" family, due in 2008, will be a high-end chip designed to run multiple threads and run each one as fast as possible.