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Monday, August 28, 2017
 Intel's Movidius X VPU Announced
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Movidius, a subsidiary of Intel, launched Monday its Myriad X vision processing unit, a follow-up, after 18 months, to the Myriad 2.

Just like Myriad 2, Myriad X is purpose-built for embedded visual intelligence and inference.

Myriad 2, an always-on many-core vision-processing unit, has already snagged big design wins from drone and surveillance companies.

In designing Myriad X, Movidius' El-Ouazzne said, "We were looking to anything that allows us to increase the performance of neural networks without increasing power."

With many more hardware acceleration blocks, Myriad X architecture can do 1 trillion operations per second (TOPS) of compute performance on deep-neural network inferences. "And we keep it within a watt."

Movidius increased the number of its SHAVE (Streaming Hybrid Architecture Vector Engine) DSP Cores from 12 [in Myriad 2] to 16.

Then, Movidius added a neural compute engine consisting of more than 20 enhanced hardware accelerators.

These hardware accelerators are designed to perform specific tasks without introducing additional compute overhead.

Programmability is also critical when customers want full-blown image signal processing (ISP) on a chip.

Myriad X offers increased configurable MIPI lanes. It connects up to 8 HD resolution RGB cameras directly to Myriad X with 16 MIPI lanes included in a rich set of interfaces, to support up to 700 million pixels per second of image signal processing throughput.

In Myriad X, the Movidius team increased on-chip memory to 2.5 megabytes, compared to 2MB in Myriad 2.

To carry neural net weights, external DRAM is necessary. Myriad X, now using Low Power Double Data Rate (LPDDR) 4 instead of LPDDR 3 in Myriad 3, incorporates 4 gigabits of DRAM in an 8 x 8.8mm package.

The Myriad X processor, able to deliver more than 4 TOPS of total performance (architectural calculation based on the maximum operations-per-second performance over all compute units), is being fabricated in Taiwan Semiconductor Manufacturing Co.'s 16nm FinFET compact process.

 
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