Thursday, April 17, 2014
Friday, June 19, 2009
 NEC Develops Scalable High-Speed MRAM Technology Suitable for System LSI Embedding
You are sending an email that contains the article
and a private message for your recipient(s).
Your Name:
Your e-mail: * Required!
Recipient (e-mail): *
Subject: *
Introductory Message:
(Photo: Yes/No)
(At the moment, only Text is allowed...)
Message Text: NEC announced today the world's first development of a magnetic random access memory (MRAM) with current-induced domain wall motion using perpendicular magnetic anisotropy material.

Perpendicular magnetic anisotropy enables a cell to carry out the current-induced domain wall motion (Note 1) writing method using spin torque (Note 2) at a low current, which leads to easy scaling down of cell size and creates suitable conditions for next generation system LSI.

NEC's focus on high speed MRAM has resulted in the development of technologies suited for memory macro (Note 4) adoption on system LSI. However, conventional memory cells that use current magnetic field writing methods (Note 5) have difficulty reducing the cell size due to the increase of writing current, particularly beyond 55 nanometer process generation.

The newly developed current-induced domain wall motion writing method, using spin torque and perpendicular magnetization material, is capable of reducing current while writing for a scaled down cell beyond the 55 nanometer process. Looking forward, NEC anticipates a future that greatly benefits from the advanced capabilities of high speed MRAM.

The features of newly developed domain wall motion cells with perpendicular magnetization materials are as follows:

- The performance of spin torque depends on current density, which influences writing current and scalability for high speed MRAM when scaling down of the cell proceeds.

- Both a reduction of writing current and improvement of stored data stability can be achieved due to the fact that the writing current and data stability are designed independently, which is difficult to achieve with conventional spin injection MRAM (Note 6).

- Since current-induced domain wall motion elements are three-terminal, they can be structured with two transistors and one MTJ (Note 7), which creates a high speed memory array with separated current path for the reading and writing.

Due to the progress of scaling down cell size and the large capacity of system LSI, power consumption has increased. Market demands now require reduced power consumption, which is partially accomplished by switching off during stand-by mode, a function that requires easy-use nonvolatile memory.

In response to these market demands, NEC developed the world's fastest SRAM-compatible MRAM with operation speed of 250 MHz in November 2007, and 32 Mbit MRAM for embedding in SoCs in February 2009.

These memory cells consist of two transistors and one MTJ (2T1MTJ). Since the selected writing cells are separate from other non-selected cells, the problem of writing to the non-selected cell is avoided.

In addition, since current path is separated into reading and writing paths, it becomes easy to suppress various malfunctions, such as writing incorrectly while reading data. These features simplify the peripheral circuit as well, thereby making it easier for them to become high speed and facilitating their adoption into system LSI. NEC is currently developing suitable three-terminal domain wall motion elements for 2T1MTJ.

The newly developed domain wall motion elements are an advanced technology of spintronics (Note 8) which switches magnetization by domain wall motion with spin polarized current (Note 9).

This successful development shows that high speed MRAM cells can be used to further advance the progress of scaling down size and it has widened the application area of memory changing into MRAM on system LSI.

These developments have been partially funded by NEDO.

NEC announced the development results at the 2009 Symposium on VLSI (VLSI 2009) in Kyoto on June 17.

(Note 1) Domain wall
Domain wall is an interface separating magnetic domain. Domain wall is a gradual reorientation of individual moments across a finite distance.

(Note 2) Current-induced domain wall motion writing method Electron spin is polarized by passing through a magnetic layer. When the spin polarized electrons inject into the domain wall, the domain wall shifts into an electron flow direction, while the direction of magnetization of the domain wall is rotated by spin torque. This movement can be used for the writing method on MRAM. NEC developed this method jointly with Kyoto University and the University of Electro-Communications in 2007.

(Note 3) Spin torque
a spin polarized current can transfer its spin angular momentum to a small magnetic element. This transfer of spin angular momentum is an origin for spin torque.

(Note 4) Memory micro
Function block for SRAM, DRAM, MRAM etc., which is embedded on SoC.

(Note 5) Current magnetic field writing methods
Conventional MRAM writing method. The magnetic moment of a memory element is switched by inducing a magnetic field with a write line current. With a decrease in element size, writing current increases due to an increase in the switching field in order to increase data stability.

(Note 6) Spin injection MRAM
MRAM whose magnetic moment of an element is switched by spin torque. Ordinarily, current is injected perpendicularly to the MTJ plane. It is also called spin-RAM.

(Note 7) MTJ
Magnetic tunneling junction. It consists of two layers of magnetic metal, such as cobalt-iron, separated by an ultra-thin layer of an insulator, typically magnesium oxide with a thickness of about 1 nm.

(Note 8) Spintronics
Spintronics, or spin electronics, refers to the study of the role played by electron spin in solid state physics, and possible devices that specifically exploit spin properties instead of or in addition to charged degrees of freedom.

(Note 9) Spin polarized current
Spin polarization is the degree to which the electron spin is aligned with a given direction.
Home | News | All News | Reviews | Articles | Guides | Download | Expert Area | Forum | Site Info
Site best viewed at 1024x768+ - CDRINFO.COM 1998-2014 - All rights reserved -
Privacy policy - Contact Us .