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Monday, May 21, 2007
 IBM Unleashes World's Fastest Processor
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Message Text: IBM has unveiled what it claims is the fastest processor in the world. The new Power 6 runs at 4.7GHz, and has an 8MB L2 cache and 790 million transistors built on a 65nm scale.

At 4.7 GHz, the dual-core POWER6 processor doubles the speed of the previous generation POWER5 while using nearly the same amount of electricity to run and cool it, according to IBM. The POWER6 chip has a total cache size of 8MB per chip - four times the POWER5 chip - to keep pace with the processor bandwidth.

In addition, IBM today simultaneously launched an ultra-powerful new computer server that leverages the chip's breakthroughs in energy conservation and virtualization technology.

IBM claims that the new 2- to 16-core server offers three times the performance per core of the HP Superdome machine, based on the key TPC-C benchmark. In addition, the processor bandwidth of the POWER6 chip - 300 gigabytes per second -- could download the entire iTunes catalog in about 60 seconds - 30 times faster than HP's Itanium, the company said.

The new server also contains special hardware and software that allows it to create many "virtual" servers on a single box.

"Like the victory of IBM's Deep Blue chess-playing supercomputer 10 years ago this month, the debut of POWER6 processor-based systems proves that relentless innovation brings 'impossible' goals within reach," said Bill Zeitler, senior vice president, IBM Systems and Technology Group.

The POWER6 chip in the new IBM System p 570 server is the first UNIX microprocessor able to calculate decimal floating point arithmetic in hardware. Until now, calculations involving decimal numbers with floating decimal points were done using software. This gives tremendous advantage to enterprises running complex tax, financial and ERP programs.

The POWER6 processor is built using IBM's 65 nanometer process technology. Coming at a time when some experts have predicted an end to Moore's Law, which holds that processor speed doubles every 18 months, IBM presented a host of technical achievements including an improved way the instructions are executed inside the chip. IBM scientists increased chip performance by keeping static the number of pipeline stages - the chunks of operations that must be completed in a single cycle of clock time -- but making each stage faster, removing unnecessary work and doing more in parallel. In addition, the company has separated circuits that can't support low voltage operation onto their own power supply "rails," allowing IBM to reduce power for the rest of the chip. Processor clocks can be also dynamically turned off when there is no useful work to be done and turned back on when there are instructions to be executed, for furhter power saving.

Power saving is also realized when the memory is not fully utilized, as power to parts of the memory not being utilized is dynamically turned off and then turned back on when needed. In cases where an over-temperature condition is detected, the POWER6 chip can reduce the rate of instruction execution to remain within a user-defined temperature envelope.

IBM plans to introduce the POWER6 chip throughout the System p and System i server lines.
 
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