Intel is participating at the ISC High Performance 2018 in Frankfurt, Germany, June 25-28, and will talk about how it's helping AI developers, data scientists and HPC programmers transform industries by tapping into HPC to power the AI solutions.
ISC brings together academic and commercial disciplines to share knowledge in the field of high performance computing. Intel's presence at the event will include keynotes, sessions, and booth demos that will be focused on the future of HPC technology, including Artificial Intelligence (AI) and visualization.
Intel ISC Booth Demos
Demo: AI on IA - Brain Tumor Segmentation
Intel will showcase an interactive demo of a solution designed to help identify brain tumors. This solution uses deep CNNs to segment brain tumors in 2D MRI images, using 2016 Brain and Tumor Segmentation (BraTS) dataset and containing 31,000 2D MRI scans at 240x240 pixel resolution. Each brain has 255 slices, and the dataset represents ~120 individuals. Intel will deliver a flexible deployment architecture that provides performance and T.C.O for GE Imaging C.T. group to deliver deep learning applications for their imaging modalities. The result is a trained model that is able to segment brain tumors just as well as a neuroradiologist. Intel then passes along the final MRI images and segmentation maps to EchoPixel for visualization.
Demo: Defined Visualization
The latest Intel Select Solution uses software-defined visualization and Intel ingredients for modeling with visualization of even the most complex and large data sizes. The demo will showcase automotive CFD Analysis with OpenFOAM, ParaView v5.5 using OSPRay to demonstrate high visual fidelity of software-defined visualization using ray tracing to display an animation of airflow over a moving vehicle.
Demo: Application Acceleration with FPGA
This demo is built around the Intel Programmable Acceleration Card with Intel Arria 10 GX FPGA (Intel PAC with Intel Arria 10 GX FPGA) and demonstrates how FPG-based processing provides high performance and low power. Intel will demonstrate how to dynamically configure an FPGA to run multiple functions or workloads using partial reconfiguration. The workloads run on the FPGA will be file compression, genome sequencing, image recognition, and video segmentation. The demo will use the Intel PAC with Intel Arria 10 GX FPGA, a collection of software, firmware, and tools to make it easier to use Intel FPGAs for workload optimization. The Acceleration Stack abstracts the FPGA design, enabling software application developers to leverage the benefits of FPGAs.
Demo: Distributed Deep Reinforcement Learning on CPU
An Adam optimization algorithm with a batch size of up to 2048 is a viable choice for carrying out large scale machine learning computations. You'll witness how this optimization is used to train an Atari agent to play games, which resulted in substantially decreasing the training time. The results were collected using a multi-node Intel Xeon processor-based cluster (formerly codenamed Haswell) and the optimized TensorFlow for Intel architecture. Intel will demonstrate the progress of the training model, including detailed hardware configuration and software stack, as well as visualization of all critical parameters of the training algorithm and their progress over time.