Claiming performance advantages over CPUs and GPUs for applications related to Big Data and artificial intelligence, Xilinx will begin rolling out a new type of multicore chip next year that emphasize compute capability and with both software- and hardware-level programmability.
Xilinx today announced a new product category called adaptive compute acceleration platform (ACAP) that goes far beyond the capabilities of an FPGA. An ACAP is a highly integrated multi-core heterogeneous compute platform that can be changed at the hardware level to adapt to the needs of a wide range of applications and workloads. An ACAP's adaptability, which can be done dynamically during operation.
An ACAP is suited to accelerate a broad set of applications in the emerging era of big data and artificial intelligence. These include: video transcoding, database, data compression, search, AI inference, genomics, machine vision, computational storage and network acceleration. Software and hardware developers will be able to design ACAP-based products for end point, edge and cloud applications. The first ACAP product family, codenamed "Everest," will be developed in TSMC 7nm process technology and will tape out later this year.
"This is a major technology disruption for the industry and our most significant engineering accomplishment since the invention of the FPGA," says Victor Peng, president and CEO of Xilinx. "This revolutionary new architecture is part of a broader strategy that moves the company beyond FPGAs and supporting only hardware developers. The adoption of ACAP products in the data center, as well as in our broad markets, will accelerate the pervasive use of adaptive computing, making the intelligent, connected, and adaptable world a reality sooner."
An ACAP has - at its core - a new generation of FPGA fabric with distributed memory and hardware-programmable DSP blocks, a multicore SoC, and one or more software programmable, yet hardware adaptable, compute engines, all connected through a network on chip (NoC). An ACAP also has highly integrated programmable I/O functionality, ranging from integrated hardware programmable memory controllers, advanced SerDes technology and leading edge RF-ADC/DACs, to integrated High Bandwidth Memory (HBM) depending on the device variant.
Software developers will be able to target ACAP-based systems using tools like C/C++, OpenCL and Python. An ACAP can also be programmable at the RTL level using FPGA tools.
Xilinx expects "Everest" to achieve 20x performance improvement on deep neural networks compared to today's latest 16nm Virtex VU9P FPGA. In addition, "Everest"-based 5G remote radio heads will have 4x the bandwidth versus the latest 16nm-based radios.
Victor Peng, the president and CEO of Xilinx, Inc. today also unveiled his vision and strategy for the company. Designed to deliver new growth, technology and direction for Xilinx, Peng's vision is to enable the "adaptable, intelligent world." In this world, Xilinx moves beyond the FPGA to deliver flexible and adaptive processors.
Xilinx is ramping up its efforts with key data center customers, ecosystem partners and software application developers, to further enable deployments in compute acceleration, computational storage and network acceleration.
Areas where Xilinx has been a technology leader and has deep market traction include: automotive; wireless infrastructure; wired communications; audio, video and broadcast; aerospace and defense; industrial, scientific and medical; test, measurement and emulation; and consumer technologies. These core markets and customers remain central to Xilinx and the company.
"While FPGA and Zynq SoC technologies are still core to our business, Xilinx is not just an FPGA company anymore," Peng said.