Sunday, August 20, 2017
Search
  
Submit your own News for
inclusion in our Site.
Click here...
Breaking News
YouTube TV expands to new markets
Facebook Tests News Stories Customized to Users' Interests
Google Home Now Supports Free Calls
Asus Unveils the ZenFone 4 Pro, ZenFone 4, ZenFone 4 Selfie Pro, and ZenFone 4 Selfie
Nokia 8 Shipped With ZEISS Optics
Apple is Getting Serious in TV Shows and Film Prospect
Acer's New 4K Projectors Bring the Benefits of Cinema Home
Fiat Chrysler Joins BMW, Intel, Mobileye in Autonomous Driving Team
Active Discussions
Which of these DVD media are the best, most durable?
How to back up a PS2 DL game
Copy a protected DVD?
roxio issues with xp pro
Help make DVDInfoPro better with dvdinfomantis!!!
menu making
Optiarc AD-7260S review
cdrw trouble
 Home > News > General Computing > Xilinx ...
Last 7 Days News : SU MO TU WE TH FR SA All News

Tuesday, March 13, 2012
Xilinx and Micron Demonstrate Hardware Interoperability of FPGA and RLDRAM 3 Memory Interface Standard


Xilinx and Micron today announced the first public hardware demonstration of an FPGA interfacing with RLDRAM 3 memory, a new and emerging memory standard for high-end networking applications such as packet buffering and inspection, linked lists, and lookup tables.

Operating with Virtex-7 and Kintex-7 FPGAs at data rates up to 1600 megabits per second (Mb/s), Micron's RLDRAM 3 memory combines high density, high bandwidth and fast SRAM-like random access to enable a 60 percent higher data rate and memory bandwidth compared to that of the previous generation (Virtex-6 FPGAs/RLDRAM2 memory standard). RLDRAM 3 memory enables 40G and 100G networking systems that require higher speed, higher density, lower power and lower latency.

Virtex-7 and Kintex-7 FPGAs are designed with the necessary IO standards and architectural components for optimal interfacing with RLDRAM 3, providing a significant boost to system performance for wireless and wired networking systems. RLDRAM 3 memory uses innovative circuit design to minimize the time between the beginning of an access cycle and the instant that the first data is available. Ultra-low bus turnaround time enables higher sustainable bandwidth with near-term balanced read-to-write ratios.

Availability/Ordering Information Hardware demonstrations of the Xilinx RLDRAM 3 Memory interface IP core are available now with user configurable IP cores available in ISE Design Suite 13.4 in September 2012. Qualified Micron RLDRAM 3 memory devices are available now in x18 and x36 organizations across all speed grades from 800 to 1066MHz.


Previous
Next
NVIDIA Begins Windows 8 Driver Updates        All News        Sony Introduces The Xperia Sola Smartphone
Mozilla Launches Firefox 11     General Computing News      Apple Patches Many Safari Bugs With Latest update

Get RSS feed Easy Print E-Mail this Message

Related News
Micron Advances Semiconductor R&D Capabilities with New Boise Facility
Micron's New Flagship 9200 NVMe Solid-State Storage Family is Blazingly Fast
Micron Posts Record Revenues in fiscal 3Q17
Micron Lexar Removable Storage Retail Business Discontinued
Crucial BX300 SSD Coming This Summer
Micron's GDDR5X Memory Hits the 16Gbps, Mass Production of GDDR6 on Track For Next Year
SK Hynix and Micron Try To Catch up With Samsung in 10nm DRAM Production
Micron Announces a 4-server-node, All-flash, Accelerated Ceph Storage Solution
Micron Unleashes the Power of NVMe Storage, With New SolidScale System
Micron Says Former Employees Gave Away DRAM Technologies To Chinese Competitors
Micron's 1xnm DRAM Process Has Low Yields, Says Report
Micron's Revenue Increased Due To Strong Memory Chip Sales

Most Popular News
 
Home | News | All News | Reviews | Articles | Guides | Download | Expert Area | Forum | Site Info
Site best viewed at 1024x768+ - CDRINFO.COM 1998-2017 - All rights reserved -
Privacy policy - Contact Us .