Thursday, May 26, 2016
Search
  
Submit your own News for
inclusion in our Site.
Click here...
Breaking News
New Toshiba 8TB X300 Hard Disk Drive Released
Microsoft Says Users Can Still Deny Windows 10 Upgrade
Apple Looking Into Charging Stations For Electric Cars: report
Google To Open Self-driving Car Engineering center in Michigan
AMD Introduces the FirePro S7100X Hardware-Virtualized GPU for Blade Servers
Europe Proposes New E-commerce Rules
HP Enterprise to Merge IT Services Unit With Computer Sciences
Samsung Introduces Galaxy Tab Iris Equipped with Iris Recognition Technology
Active Discussions
Which of these DVD media are the best, most durable?
How to back up a PS2 DL game
Copy a protected DVD?
roxio issues with xp pro
Help make DVDInfoPro better with dvdinfomantis!!!
menu making
Optiarc AD-7260S review
cdrw trouble
 Home > News > General Computing > Xilinx ...
Last 7 Days News : SU MO TU WE TH FR SA All News

Tuesday, March 13, 2012
Xilinx and Micron Demonstrate Hardware Interoperability of FPGA and RLDRAM 3 Memory Interface Standard


Xilinx and Micron today announced the first public hardware demonstration of an FPGA interfacing with RLDRAM 3 memory, a new and emerging memory standard for high-end networking applications such as packet buffering and inspection, linked lists, and lookup tables.

Operating with Virtex-7 and Kintex-7 FPGAs at data rates up to 1600 megabits per second (Mb/s), Micron's RLDRAM 3 memory combines high density, high bandwidth and fast SRAM-like random access to enable a 60 percent higher data rate and memory bandwidth compared to that of the previous generation (Virtex-6 FPGAs/RLDRAM2 memory standard). RLDRAM 3 memory enables 40G and 100G networking systems that require higher speed, higher density, lower power and lower latency.

Virtex-7 and Kintex-7 FPGAs are designed with the necessary IO standards and architectural components for optimal interfacing with RLDRAM 3, providing a significant boost to system performance for wireless and wired networking systems. RLDRAM 3 memory uses innovative circuit design to minimize the time between the beginning of an access cycle and the instant that the first data is available. Ultra-low bus turnaround time enables higher sustainable bandwidth with near-term balanced read-to-write ratios.

Availability/Ordering Information Hardware demonstrations of the Xilinx RLDRAM 3 Memory interface IP core are available now with user configurable IP cores available in ISE Design Suite 13.4 in September 2012. Qualified Micron RLDRAM 3 memory devices are available now in x18 and x36 organizations across all speed grades from 800 to 1066MHz.


Previous
Next
NVIDIA Begins Windows 8 Driver Updates        All News        Sony Introduces The Xperia Sola Smartphone
Mozilla Launches Firefox 11     General Computing News      Apple Patches Many Safari Bugs With Latest update

Get RSS feed Easy Print E-Mail this Message

Related News
Micron Unveils New NVMe PCIe SSDs, New Flash-storage Solutions For Open Source Data Centers
Micron Swings to Loss
Samsung To Start Mass-Producing 18nm DRAM
Micron Outlines Tts First 3D NAND Products
Micron Outlines GDDR5X Plans
768 Gbit Micron 3D NAND Is Faster Than Samsung’s 256Gb V-NAND: ISSCC
Micron Envisions To Deliver 32GB SSDs
18nm DRAM Coming Next Year
Micron To License 1x and 1y DRAM Technologies to Nanya
Micron's Persistent Memory Solution Combines DRAM Performance With NAND Flash Reliability
Micron's XTRMFlash Memory Breaks Through NOR Flash Speed Limits
Micron, Western Digital Consider Buying SanDisk: report

Most Popular News
 
Home | News | All News | Reviews | Articles | Guides | Download | Expert Area | Forum | Site Info
Site best viewed at 1024x768+ - CDRINFO.COM 1998-2016 - All rights reserved -
Privacy policy - Contact Us .