Saturday, January 31, 2015
Search
  
Submit your own News for
inclusion in our Site.
Click here...
Breaking News
ASUS Announces The B85M-Gamer Mainboard
AT&T, Verizon Among Winners Of US Airwaves Auction
Apple Closes the Gap on Samsung Fourth Quarter's Worldwide Smartphone Shipments
Verizon To Let USers Opt Out Supercookies
Microsoft Outlines Windows 10 Options For The Enterprise
Jolla Tablet Returns to Indiegogo With A 64GB Version
BT Sees Ultrafast Broadband Not Coming Earlier Than 2025
Google To Change Privacy Policy After UK's Watchdog Investigation
Active Discussions
Why Double Logins ?
retrieving burned cd information
Writing Audio files on DVDs ?
Need major help with Gigabeat
New match-3 puzzle game launch now!
Rimage 2000i
Sound card for my Laptop
hello
 Home > News > General Computing > TSMC Ne...
Last 7 Days News : SU MO TU WE TH FR SA All News

Tuesday, June 15, 2010
TSMC New Standard Cell Slim Library Reduces Logic Area


Taiwan Semiconductor Manufacturing Company today introduced the first Slim Library that reduces system-on-chip (SoC) routed logic block area by 15 percent compared to blocks routed through current standard cell libraries.

The library targets TSMC's 65nm LP process technology and fits existing implementation flows for easy adoption. Designers can use the new Slim Library in existing or new designs without change to design tools and implementation methodologies.

Slim Library is the result of the AreaTrim design and process co-optimization program between the TSMC and Tela Innovations. The library is based on Tela's patented layout style and TSMC's process optimization. The two companies demonstrated the 15% area improvement through synthesis and timing-driven place and route implementations on multiple versions of widely used microprocessor cores.

The new library's layout style draws a lithography-optimized pattern with uniform density through unidirectional poly on a fixed pitch and improved manufacturing process control to reduce area. As a result, Slim Library achieves gate densities of up to 1 million gates per square millimeter.

Slim Library is re-designed into 8 tracks from the traditional 9-track configuration, yet provides equivalent performance and power. The library includes Multiple Vt options and power management cells along with full set of characterization corners.

The new 65LP Slim Library is available now in limited release through the TSMC Online customer design portal (http://online.tsmc.com/online) or by contacting local TSMC account management or support representatives. General release is targeted for the first quarter of 2011.


Previous
Next
European Research Project Aims for Greener Electronics        All News        Khronos Releases OpenCL 1.1 Specification
European Research Project Aims for Greener Electronics     General Computing News      Toshiba develops Silicon Nanowire Transistor for 16nm Generation and Beyond

Get RSS feed Easy Print E-Mail this Message

Related News
TSMC Selling Sold ASML Stake
TSMC Sells LED Unit to Epistar
TSMC Chairman Sees Technical Hurdles In keeping Up With Moore's Law
TSMC To Make Intel's SoFIA Handset Chips
TSMC 16FinFET Plus Process Achieves Risk Production Milestone
TSMC Said To Make New iPad Processor
ARM and TSMC Unveil Roadmap for 64-bit ARM-based Processors on 10FinFET Process
TSMC and ARM Announce 16nm FinFET Silicon with 64-bit ARM big.LITTLE Technology
TSMC Launches Ultra-Low Power Technology Platform for IoT and Wearable Devices
TSMC Delivers First 16FinFET Networking Processor
TSMC Acquires EUV Machines For 10nm Chips
TSMC 28HPC Process Enters Volume Production

Most Popular News
 
Home | News | All News | Reviews | Articles | Guides | Download | Expert Area | Forum | Site Info
Site best viewed at 1024x768+ - CDRINFO.COM 1998-2015 - All rights reserved -
Privacy policy - Contact Us .