Sunday, July 05, 2015
Search
  
Submit your own News for
inclusion in our Site.
Click here...
Breaking News
Minecraft Windows 10 Edition Beta Revealed
U.S. In Running out Of IP Addresses
Uber Suspends UberPOP in France
Casio To Enter The Smartwatch Market
GELID Has A new Low-profile CPU Cooler for Intel LGA115x
Sharp Plans to Release Transparent LCDs
ARCHOS Unveils the ARCHOS 50d Helium
July 29 Won't Be The Day You'll Get Your Windows 10 Upgrade
Active Discussions
How to back up a PS2 DL game
Copy a protected DVD?
roxio issues with xp pro
How to burn a backup copy of The Frozen Throne
Help make DVDInfoPro better with dvdinfomantis!!!
Copied dvd's say blank in computer only
menu making
Optiarc AD-7260S review
 Home > News > General Computing > TSMC Ne...
Last 7 Days News : SU MO TU WE TH FR SA All News

Tuesday, June 15, 2010
TSMC New Standard Cell Slim Library Reduces Logic Area


Taiwan Semiconductor Manufacturing Company today introduced the first Slim Library that reduces system-on-chip (SoC) routed logic block area by 15 percent compared to blocks routed through current standard cell libraries.

The library targets TSMC's 65nm LP process technology and fits existing implementation flows for easy adoption. Designers can use the new Slim Library in existing or new designs without change to design tools and implementation methodologies.

Slim Library is the result of the AreaTrim design and process co-optimization program between the TSMC and Tela Innovations. The library is based on Tela's patented layout style and TSMC's process optimization. The two companies demonstrated the 15% area improvement through synthesis and timing-driven place and route implementations on multiple versions of widely used microprocessor cores.

The new library's layout style draws a lithography-optimized pattern with uniform density through unidirectional poly on a fixed pitch and improved manufacturing process control to reduce area. As a result, Slim Library achieves gate densities of up to 1 million gates per square millimeter.

Slim Library is re-designed into 8 tracks from the traditional 9-track configuration, yet provides equivalent performance and power. The library includes Multiple Vt options and power management cells along with full set of characterization corners.

The new 65LP Slim Library is available now in limited release through the TSMC Online customer design portal (http://online.tsmc.com/online) or by contacting local TSMC account management or support representatives. General release is targeted for the first quarter of 2011.


Previous
Next
European Research Project Aims for Greener Electronics        All News        Khronos Releases OpenCL 1.1 Specification
European Research Project Aims for Greener Electronics     General Computing News      Toshiba develops Silicon Nanowire Transistor for 16nm Generation and Beyond

Get RSS feed Easy Print E-Mail this Message

Related News
TSMC To Move To 10nm Production in 2016
TSMC Solar Commercial-size Modules Achieve Record Efficiency
TSMC Start 10nm Manufacturing in mid-2016
TSMC Reports 65 pct Rise in Q1 Profit
TSMC Achieves EUV Productivity Milestone
TSMC Selling Sold ASML Stake
TSMC Sells LED Unit to Epistar
TSMC Chairman Sees Technical Hurdles In keeping Up With Moore's Law
TSMC To Make Intel's SoFIA Handset Chips
TSMC 16FinFET Plus Process Achieves Risk Production Milestone
TSMC Said To Make New iPad Processor
ARM and TSMC Unveil Roadmap for 64-bit ARM-based Processors on 10FinFET Process

Most Popular News
 
Home | News | All News | Reviews | Articles | Guides | Download | Expert Area | Forum | Site Info
Site best viewed at 1024x768+ - CDRINFO.COM 1998-2015 - All rights reserved -
Privacy policy - Contact Us .