Toshiba today launched a 64 gigabyte (GB) embedded NAND flash
memory module, the highest capacity yet achieved in the industry.
The chip is the flagship device in a line-up of six new embedded
NAND flash memory modules that offer full compliance with the
latest e-MMC standard, and that are designed for application in a
wide range of digital consumer products, including Smartphones,
mobile phones, netbooks and digital video cameras.
Samples of the 64GB module are available from today, and mass production will start in the first quarter of 2010, Todhiba said.
The new 64GB embedded device combines sixteen pieces of 32Gbit
(equal to 4GB) NAND chips fabricated with Toshiba's
32nm process technology, and also integrates a dedicated
controller. Toshiba is the first company to succeed in combining
16 pieces of 32Gbit NAND chips, and applied advanced chip thinning
and layering technologies to realize individual chips that are
only 30 micrometers thick. Full compliance with the JEDEC/MMCA
Version 4.4 (V4.4) standard for embedded MultiMediaCards supports
standard interfacing and simplifies embedding in products,
reducing development burdens on product manufacturers.
Toshiba offers a line-up of single-package embedded
NAND Flash memories in densities ranging from 2GB to 64GB. All
integrate a controller to manage basic control functions for NAND
applications, and are compatible with the latest e-MMCTM standard
and its new features, including defining multiple storage areas
and enhanced security features.
"The e-MMC interface has become the most widely embraced embedded
NAND solution with a built-in controller to simplify integration
into system designs. With the addition of higher density, Ver 4.4
e-MMC compliant product offered as single package solutions or as
part of a multi-chip module combined with DRAM, Toshiba can help
designers reduce memory subsystem space requirements," said Scott
Beekman, business development manager, mobile communications
memory for TAEC.
Toshiba e-MMC Ver 4.4 devices are available in a standard
configuration with the NAND flash and built-in controller or in a
multi-chip module (MCP) with DRAM or other memory to reduce the
memory subsystem requirement to one chip. Toshiba MCPs offer
multiple memory technologies such as NAND Flash, NOR Flash, Pseudo
SRAM (PSRAM), and low-power SDRAM in a single package to simplify
layout and save board space in increasingly complex,
feature-rich cellular phones.
Interface: JEDEC/ MMCA V4.4 standard HS-MMC interface
Power Supply Voltage: 2.7V to 3.6V (memory core); 1.65V to 1.95V /
2.7V to 3.6V (interface)
Bus width: x1, x4, x8
Target 20MB per sec. (Sequential/Interleave Mode)
Target 9MB per sec. (Sequential/No Interleave Mode)
Target 37MB per sec. (Sequential Mode/Interleave Mode)
Target 22MB per sec. (Sequential/No Interleave Mode)
Temperature range: -25degrees to +85degees Celsius
Package: 153Ball FBGA (+16 support balls)