Sunday, May 01, 2016
Search
  
Submit your own News for
inclusion in our Site.
Click here...
Breaking News
You Can No Longer Use Google In Cortana searches
HP Releases New Chromebook for Home and Office
AMD and Nantong Fujitsu Microelectronics Close on Semiconductor Assembly and Test Joint Venture
Google's Pichai Sees the End of Computers
Amazon Reports Strong Quarter
Sony Reports Loss But PlayStation Keeps Performing Well
Japan Display Showcase The Latest In Display Technologies In SID DISPLAY WEEK 2016
Strong Galaxy S7 Sales Keep Samsung's Profit High
Active Discussions
Which of these DVD media are the best, most durable?
How to back up a PS2 DL game
Copy a protected DVD?
roxio issues with xp pro
Help make DVDInfoPro better with dvdinfomantis!!!
menu making
Optiarc AD-7260S review
cdrw trouble
 Home > News > General Computing > TSMC Re...
Last 7 Days News : SU MO TU WE TH FR SA All News

Wednesday, June 17, 2009
TSMC Reports Foundry's First 28 Nanometer Low Power Platform Technology with Fully Functional 64Mb SRAM


Taiwan Semiconductor Manufacturing Company today announced it has successfully developed the first 28-nanometer (nm) low power technology that continues the scaling trend and extends Silicon Oxynitride (SiON)/poly usage beyond 32 nanometer with a dual/triple gate oxide process.

Other characteristics from this technology includes high density and low Vcc_min 6-T SRAM cells, low leakage transistors, well-proven conventional analog/RF/electrical fuse components and low-RC Cu-low-k interconnect. This development was presented today in a paper at the 2009 Symposia on VLSI Technology and Circuits in Kyoto, Japan.

Additionally, the paper reports good 64Mb SRAM functional yield with a competitive cell size of 0.127 um˛, and a raw gate density as high as 3900 kGate/mm˛ in this 28nm dual/triple gate oxide SoC technology. Good SRAM Vcc_min, electrical fuse, and analog performance have also been achieved which proves the manufacturability of this technology.

In the paper presented, low standby and low operating power transistors using SiON optimized with strain engineering and aggressive oxide thickness provide up to 25~40% speed improvement or 30~50% active power reduction over prior 45nm technology.

"This development was achieved through close collaboration with customers who are pushing their own boundaries of new applications requiring 28nm technology," said Dr. Jack Sun, vice president R&D at TSMC.

In the previous announcement made in September 2008, TSMC plans to deliver its 28nm process in early 2010 as a full node technology offering options of power-efficient high performance and lower power technologies. TSMC is now on track to deliver 28nm technology platforms to its customers.


Previous
Next
Patriot's Launches 128GB Magnum USB Flash Drive        All News        Nero Summer Promotion: Nero 9 Plus Unlimited MP3 and Video Downloads
NEC and Toshiba Extend 28nm Chip Technology Development Agreements with IBM     General Computing News      GLOBALFOUNDRIES Details Advanced Technology Aimed at 22nm and Beyond

Get RSS feed Easy Print E-Mail this Message

Related News
TSMC On Track To Move InFO Packaging Technology to Volume Production
TSMC Forecasts Slow Sales Amid Smartphone Slowdown
TSMC To Build 12-inch Fab In China
ARM and TSMC To Collaborate on 7nm FinFET Process Technology
Samsung Lost iPhone 7 Chip Contract
TSMC Says Recent Earthquake Damaged Wafers
TSMC Wins Exclusive Chip Contract For Next iPhone: report
Chip Makers Differientate In terms Of Equipment Investments
Taiwan Earthquake Temporarily Suspended TSMC's And UMC's Production
TSMC Confident That It Will Lead The 10nm Foundry Segment
TSMC Has Started Woking On 5nm Manufacturing Process
TSMC To Open 12-inch Wafer Fab and Design Service Center in China

Most Popular News
 
Home | News | All News | Reviews | Articles | Guides | Download | Expert Area | Forum | Site Info
Site best viewed at 1024x768+ - CDRINFO.COM 1998-2016 - All rights reserved -
Privacy policy - Contact Us .