Anand Chandrasekher, Intel senior vice president and general manager of the Ultra Mobility Group, introduced two new processors for Mobile Internet Devices (MIDs) and several other milestones during his keynote today at the Intel Developer Forum in Beijing.
Chandrasekher was joined by two other Intel executives, Craig Barrett and Pat Gelsinger, whose keynotes focused on the company's directions for the next year and beyond. The event, held at the Renaissance Beijing Capital Hotel.
During his keynote, titled "Mobility's Next Wave of Growth," Chandrasekher demonstrated the first live demo of Intel's next-generation Atom-based MID platform, codenamed "Moorestown" Chandrasekher provided a sneak peek into the low-power innovation of the platform by showcasing a greater than 10x idle power reduction compared to today's Atom-based platform in a side-by-side demo. This reduction is made possible through a combination of new power management techniques, a new partition optimized for the MID segments and Intel's Hi-k 45nm manufacturing process.
Due by 2010, the Moorestown platform is comprised of a System on Chip (codenamed "Lincroft") that integrates a 45nm Intel Atom processor core, graphics, video and memory controller, and a companion input/output (I/O) hub (codenamed "Langwell"). The platform will be accompanied by a new Moblin software version that is optimized to enable the rich Internet experience along with cellular voice capabilities.
Intel also announced two new Atom processors for MIDs: the Z550 and Z515. The Z550 extends the performance of the MID product line to 2GHz with Intel Hyperthreading technology support, setting a new standard for the highest performance processor in the under-3-watt power envelope. The Z515 incorporates the new Intel Burst Performance Technology (Intel BPT), which enables the processor to run at 1.2GHz when performance is needed in existing small and sleek MID form factors.
Chandrasekher also announced several new MID designs for the China market.
Discussing Intel Centrino 2-based laptops, Chandrasekher pointed out additional OEMs choosing to include Intel ultra low-voltage processors to create ultra-thin laptop designs that are less than 1 inch thick. While lighter in size and weight, these notebooks still offer great performance and battery life. Chandrasekher then described the next-generation processors for laptops based on the Nehalem architecture that will be available in the second half of this year on the "Calpella" platform. These processors will be more powerful then their predecessors by including such technologies as Intel Hyper-Threading Technology and Intel Turbo Boost Technology.
During his keynote, titled "IA: The Intelligent Architecture Investment," Pat Gelsinger, Intel senior vice president and general manager of the Digital Enterprise Group, discussed Intel's latest client, server and embedded product lines, and gave developers an update on the latest programming tools available for the Larrabee architecture.
Intel's complete Intel Architecture future product roadmap was also revealed. Gelsinger said the "Nehalem" microarchitecture has received worldwide acclaim with the Core i7 processor launch in 2008 and the recent Nehalem-based Xeon 5500 series introduction.
Gelsinger said Intel and the industry now look to adopting more mainstream PC and laptop versions of the Nehalem microarchitecture, including 32nm manufactured versions with on-processor graphics, as well the multi-socket Nehalem EX server processor, all in production in the second half of 2009. The future Nehalem-EX processor will provide eight cores for the multiprocessor "intelligent server" market.
For embedded computers, Gelsinger discussed a range of recently announced Atom processor solutions with industrial temp for applications such as in-vehicle infotainment and industrial automation. He also disclosed, for the first time ever, the Nehalem-EP based processor (codenamed "Jasper Forest") that is specifically designed to deliver increased compute density and integration required for embedded and storage applications.
Gelsinger also addressed Larrabee, which is Intel's first many-core architecture designed for high throughput applications and features a programmable graphics pipeline that enables developer freedom. The Intel executive discussed availability of a C++ Larrabee Prototype Library and a future parallel programming solution based on "Ct" technology. The first Larrabee discrete graphics products are due in the late 2009/2010 timeframe.