Chipset design company SiS said today that it has joined the Power Forward Initiative (PFI) and plans to offer a Common Power Format (CPF)-based design solution for its chipset, motherboard, reference design and systems customers.

SiS uses the Cadence Design Systems, Low-Power Solution that integrates logic design, verification, and implementation technologies with the Common Power Format.

"Our participation in the Power Forward Initiative will help us to serve our customers in need of more power-efficient computing platforms," said Nelson Lee, Marketing Director at SiS.

The Power Forward Initiative, which has more than 30 member companies, is an industry initiative sponsored by Cadence Design Systems which has the goal of enabling the design and production of more power-efficient electronic devices. The initiative includes companies representing a broad cross section of the design chain including system, semiconductor, foundry, IP, EDA, ASIC and design services companies.