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 Home > News > Digital Cameras > Sony De...
Last 7 Days News : SU MO TU WE TH FR SA All News

Wednesday, January 30, 2008
Sony Develops 35mm CMOS Image Sensor with 24.81 Effective Megapixel Resolution


Sony today announced the development of a 35mm full size (diagonal:43.3mm/Type 2.7) 24.81 effective megapixel CMOS image sensor designed for digital SLR cameras.

In recent years, the demand for digital SLR cameras featuring high resolution and wide graduation ranges capable of capturing every detail of the subject matter has continued to increase, particularly among high-end amateur users. Additionally, the increasing user requirement to shoot from the same focal length and angle as 35mm film cameras using interchangeable lenses has led to significant interest in the development of 35mm, full size CMOS image sensors.

However, there are a number of technical challenges to developing full (large) size image sensors, such as the propagation delay caused by using extended power circuitry and signal lines, and the difficulty of maintaining uniform sensitivity and signal saturation across the surface of the screen.



It is therefore extremely important to accurately control exposure variance and match circuit patterns.

The newly developed CMOS image sensor combines new circuit design technology with Sony's fabrication expertise, such as advanced planarization for minimizing fluctuation, to realize 35mm, full size, 24.81 effective megapixel resolution. Sony's "Column-Parallel A/D Conversion Technique" also provides each column within the sensor with its own A/D converter, minimizing image degradation caused by the noise that arises during analog processing while at the same time delivering a high signal conversion speed.

Sony will target for mass production of this CMOS image sensor within this year.

Major features

1. High picture quality in 35mm full size image sensor with 24.81M effective pixels

2. "Column-Parallel A/D Conversion method" achieves high S/N and high-speed imaging
- CDS/PGA(24dB)Circuit (PGA: Programmable Gain Amplifier)
- 12bit-AD Converter on chip
- Diversified readout mode
- All-pixel scan mode 6.3 frame/s (12bit)
- Window readout

3. High-speed digital output (12 channel parallel LVDS output)

Device Structure

Image size Diagonal: width 43.3mm (Type 2.7)
Total number of pixels: 6236(H) x 4124(V) approx. 25.72M pixels
Number of effective pixels: 6104(H) x 4064(V) approx.24.81M pixels
Number of active pixels: 6096(H) x 4056(V) approx.24.73M pixels
Chip size: 41.0mm (H) x 31.9 mm (V)
Unit cell size: 5.94?m (H) x 5.94?m (V)


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