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Wednesday, July 25, 2007
STMicroelectronics and IBM to Collaborate on Chip Technology


STMicroelectronics and IBM today announced that the two companies have signed an agreement to collaborate on the development of next-generation process technology -- the "recipe" that is used in semiconductor development and manufacturing.

The agreement includes 32-nanometer (nm) and 22nm complementary metal-oxide-semiconductor (CMOS) process-technology development, design enablement and advanced research adapted to the manufacturing of 300-millimeter (mm) silicon wafers. In addition it includes both the core bulk CMOS technology and value-added derivative System-on-Chip (SoC) technologies. The new agreement between IBM and ST will also include collaboration on IP development and platforms to speed the design of system-on-chip devices in these technologies.

As part of the agreement, each company will establish a technical development team at the other company's facility. For bulk CMOS development, ST will establish a research and development team in IBM's Semiconductor Research and Development Center in East Fishkill and Albany, New York. At the same time, IBM will establish a research and development team at ST's 300mm wafer semiconductor R&D and fabrication facility in Crolles, France, where the two companies will jointly develop a variety of value-added derivative technologies, such as embedded memory and analog/RF. These technologies can be broadly applied in consumer and server markets and in wireless applications, such as cell phones and global positioning devices.

STMicroelectronics will join a partnership of semiconductor manufacturing, development and technology companies who collaborate to address the design complexity and advanced process development necessary for producing smaller, faster, more cost efficient semiconductors.

Similarly, IBM and ST will work together to expand the network at ST's 300mm wafer semiconductor fabrication facility in France to include other members of IBM's CMOS technology alliance interested in the development of value-added derivative SoC technologies.

The jointly developed processes will be ramped up into volume production at ST's 300mm wafer semiconductor fabrication facility (Crolles, France), as well as in the Common Platform manufacturers' 300mm facilities, which includes IBM.

Financial details relating to this deal were not disclosed.


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