Monday, August 29, 2016
Search
  
Submit your own News for
inclusion in our Site.
Click here...
Breaking News
WhatsApp Privacy Changes Raise EU Concern
Fitbit Unveils New Fitbit Charge 2 and Fitbit Flex Fitness Trackers
Kingston Releases New Entry-level DC400 Data Center SSD
Samsung to Reveal New Quantum Dot Curved Monitors At IFA 2016
Facebook 'Trending' To Rely Less On Humans
Apple Patches iOS Security Flaws Discovered In Spyware Targeting Activist
LG To Showcase Latest OLED TVs Compatible With HDR Technologies At IFA
NHK Join Forces With Panasonic And Sony To Win The 8K TV Race
Active Discussions
Which of these DVD media are the best, most durable?
How to back up a PS2 DL game
Copy a protected DVD?
roxio issues with xp pro
Help make DVDInfoPro better with dvdinfomantis!!!
menu making
Optiarc AD-7260S review
cdrw trouble
 Home > News > Consumer Electronics > Toshiba...
Last 7 Days News : SU MO TU WE TH FR SA All News

Tuesday, June 12, 2007
Toshiba Develops New NAND Flash Technology


Toshiba today announced a new three dimensional memory cell array structure that enhances cell density and data capacity without relying on advances in process technology, and with minimal increase in the chip die size.

Toshiba announced its new development at the VLSI symposium on June 12.

In the new structure, pillars of stacked memory elements pass vertically through multi-stacked layers of electrode material and utilize shared peripheral circuits. The new design is a potential candidate technology for meeting future demand for higher density NAND flash memory.

Typically, advances in memory density reflect advances in process technology. Toshiba's new approach is based on innovations in the stacking process. Existing memory stacking technologies simply stack two-dimensional memory array on top of another, repeating the same set of processes. While this achieves increased memory cell density, it makes the manufacturing process longer and more complex. The new array does increase memory cell density, is easier to fabricate, and does not produce much increase in chip area, as peripheral circuits are shared by several silicon pillars.



Toshiba said that it would further develop this technology to the level where it wouold be secure and reliabile.


Previous
Next
Nokia's Wireless Technology to Be New Bluetooth Standard        All News        Intel Core 2 Extreme Overclocked at 5 GHz
Epson and Philips Release Reference Design for SVGA Projectors     Consumer Electronics News      Mitsubishi Announces, 640 nm 150 mW CW Laser Diode

Get RSS feed Easy Print E-Mail this Message

Related News
Toshiba to Implement Eyefi Connected Features in Next FlashAir SD Cards
Micron Announces QuantX Branding For 3D XPoint Memory, Releases 3D NAND flash for Mobile Devices
Toshiba Debuts Flashmatrix Technology
Toshiba Announces New BG SSDs with 3-Bit-Per-Cell TLC BiCS FLASH
Toshiba's ZD6000 Dual Port NVMe SSD Offers A Capacity Of 7.68TB
Western Digital Announces First 64 Layer 3D NAND Technology
Toshiba To Produce First 64-layer 3D NAND Flash Memory Chip
Toshiba PC Business Not Affected By Company's Restructuring
Toshiba Develops High-Speed MTJ Element for Non-Volatile STT-MRAM For 2X nm Generation Transistors
Toshiba Develops Circuit Technology for Small Area Non-volatile FPGAs
New Imaging Technique Can Simultaneously Acquire a Color Image and Depth Map from a Single Image Taken with a Monocular Camera
New Toshiba 8TB X300 Hard Disk Drive Released

Most Popular News
 
Home | News | All News | Reviews | Articles | Guides | Download | Expert Area | Forum | Site Info
Site best viewed at 1024x768+ - CDRINFO.COM 1998-2016 - All rights reserved -
Privacy policy - Contact Us .