Tuesday, February 28, 2017
Search
  
Submit your own News for
inclusion in our Site.
Click here...
Breaking News
MWC 2017: Porsche Design Reveals 2-in-1 with Windows 10
GDC 17: Google Announces New Games For Daydream
Oppo Brings 5X Optical Zoom To Dual-camera Smartphones
Kingston Ships 2TB USB Flash Drive
One-Blue Lowers Blu-ray Licensing Fees
Twitch to Sell Video Games on Streaming Site
Personal Computing Devices Outlook Remains Mildly Negative, Detachable Tablets And Convertible Notebooks See Growth
Gionee Launch New Selfie-focused A1 And A1 Plus Smartphones
Active Discussions
Which of these DVD media are the best, most durable?
How to back up a PS2 DL game
Copy a protected DVD?
roxio issues with xp pro
Help make DVDInfoPro better with dvdinfomantis!!!
menu making
Optiarc AD-7260S review
cdrw trouble
 Home > News > Consumer Electronics > Toshiba...
Last 7 Days News : SU MO TU WE TH FR SA All News

Tuesday, June 12, 2007
Toshiba Develops New NAND Flash Technology


Toshiba today announced a new three dimensional memory cell array structure that enhances cell density and data capacity without relying on advances in process technology, and with minimal increase in the chip die size.

Toshiba announced its new development at the VLSI symposium on June 12.

In the new structure, pillars of stacked memory elements pass vertically through multi-stacked layers of electrode material and utilize shared peripheral circuits. The new design is a potential candidate technology for meeting future demand for higher density NAND flash memory.

Typically, advances in memory density reflect advances in process technology. Toshiba's new approach is based on innovations in the stacking process. Existing memory stacking technologies simply stack two-dimensional memory array on top of another, repeating the same set of processes. While this achieves increased memory cell density, it makes the manufacturing process longer and more complex. The new array does increase memory cell density, is easier to fabricate, and does not produce much increase in chip area, as peripheral circuits are shared by several silicon pillars.



Toshiba said that it would further develop this technology to the level where it wouold be secure and reliabile.


Previous
Next
Nokia's Wireless Technology to Be New Bluetooth Standard        All News        Intel Core 2 Extreme Overclocked at 5 GHz
Epson and Philips Release Reference Design for SVGA Projectors     Consumer Electronics News      Mitsubishi Announces, 640 nm 150 mW CW Laser Diode

Get RSS feed Easy Print E-Mail this Message

Related News
Western Digital Releases New iNAND 7350 Storage Solution Built on 3D NAND
Toshiba Starts Sampling 64-Layer, 512-gigabit 3D Flash Memory
Toshiba Books $6.3 Billion Writedown, Chairman Resigns
Toshiba Starts Construction of Fab 6 at Yokkaichi, Japan
Toshiba Announces First MN Series HDDs
SK hynix Bids for Stake in Toshiba's Memory Chip Business
Western Digital Introduces First 512 Gigabit 64-Layer 3D NAND Chip
Micron's 2017 Roadmap Includes 64-layer 3D NAND And GDDR6
Toshiba Faces New Lawsuits Over 2015 Accounting Scandal
Toshiba to Sell Part Of Its of Chip Unit
Toshiba May Spin Off Its Semiconductor Business
CES 2017: Toshiba Debuts Portege X20W 2-in-1 Convertible

Most Popular News
 
Home | News | All News | Reviews | Articles | Guides | Download | Expert Area | Forum | Site Info
Site best viewed at 1024x768+ - CDRINFO.COM 1998-2017 - All rights reserved -
Privacy policy - Contact Us .