Taiwan Semiconductor Manufacturing Company announced the foundry industry?s first functional 65nm embedded DRAM customer product.
The product contains millions of DRAM bits and was silicon
verified first time right.
TSMC achieved 65nm product production in the second quarter last year. The company has also been in 90nm embedded DRAM production since the first quarter of 2006.
TSMC?s 65nm embedded DRAM process and IP provide a higher
bandwidth, lower power consumption, and a close to 50% smaller cell
and macro size than previous high density memory generations.
The 65nm embedded DRAM?s higher bandwidth is ideal for game
console, high-end networking, digital consumer, and multimedia
processors. It consumes less active and stand-by power than
alternative high density memory technology while eliminating the
need to power up I/Os.
TSMC 65nm embedded DRAM uses a
low thermal budget module that can be added to the company?s
standard CMOS process. It is compatible with all 65nm logic
libraries making it an efficient process for IP reuse. The embedded
DRAM design features improved retention time and special power
saving options for low power applications including sleep mode,
partial power cut-off and on-chip temperature compensation.
The 65nm embedded DRAM process is built on up to 10 metal layers
using copper low-k interconnect and nickel silicide transistor
interconnect. It features a cell size less than a quarter of its
SRAM counterpart, and macro densities ranging from 4Mbits to