Sunday, May 01, 2016
Search
  
Submit your own News for
inclusion in our Site.
Click here...
Breaking News
You Can No Longer Use Google In Cortana searches
HP Releases New Chromebook for Home and Office
AMD and Nantong Fujitsu Microelectronics Close on Semiconductor Assembly and Test Joint Venture
Google's Pichai Sees the End of Computers
Amazon Reports Strong Quarter
Sony Reports Loss But PlayStation Keeps Performing Well
Japan Display Showcase The Latest In Display Technologies In SID DISPLAY WEEK 2016
Strong Galaxy S7 Sales Keep Samsung's Profit High
Active Discussions
Which of these DVD media are the best, most durable?
How to back up a PS2 DL game
Copy a protected DVD?
roxio issues with xp pro
Help make DVDInfoPro better with dvdinfomantis!!!
menu making
Optiarc AD-7260S review
cdrw trouble
 Home > News > PC Parts > Intel D...
Last 7 Days News : SU MO TU WE TH FR SA All News

Tuesday, September 26, 2006
Intel Develops Tera-Scale Research Chips


Experimental Chips Could Bring TeraFLOP Performance, Terabytes of Bandwidth into Wide Use in Future Computers and Data Centers

Intel Corporation today described the significant technical challenges that need to be addressed if computing, from personal devices to giant data centers, is to keep up with increasing demand by consumers and businesses for Internet-based software, services and media-rich experiences.

In a speech today at the Intel Developer Forum, Intel Senior Fellow and Chief Technology Officer Justin Rattner said that during the next decade online software services, hosted by mega data centers with more than a million servers, will allow people to access personal data, media and applications from any high-performance device to play photo-realistic games, share real-time video and do multimedia data mining. This new usage model will challenge the industry to deliver the one trillion floating-point operations-per-second (teraFLOPs) of performance and terabytes of bandwidth.

"The rise of mega data centers and the need for high-performance personal devices will require the industry to innovate at every level, from many-core processors to higher-speed communications between systems, while delivering better security and energy efficiency," said Rattner. "Solving these challenges will bring benefits to all computing devices while creating new markets and opportunities for developers and systems designers."

Tera-Scale Research Prototype Chips

Rattner outlined the importance of three major silicon breakthroughs. He started by revealing the first details of Intel's tera-scale research prototype silicon, the world's first programmable TeraFLOP processor. Containing 80 simple cores and operating at 3.1 GHz, the goal of this experimental chip is to test interconnect strategies for rapidly moving terabytes of data from core to core and between cores and memory.

"When combined with our recent breakthroughs in silicon photonics, these experimental chips address the three major requirements for tera-scale computing teraOPS of performance, terabytes-per-second of memory bandwidth, and terabits-per-second of I/O capacity," said Rattner. ?While any commercial application of these technologies is years away, it is an exciting first step in bringing tera-scale performance to PCs and servers.?

Unlike existing chip designs where hundreds of millions of transistors are uniquely arranged, this chip's design consists of 80 tiles laid out in an 8x10 block array. Each tile includes a small core, or compute element, with a simple instruction set for processing floating-point data, but is not Intel Architecture compatible. The tile also includes a router connecting the core to an on-chip network that links all the cores to each other and gives them access to memory.

The second major innovation is a 20 megabyte SRAM memory chip that is stacked on and bonded to the processor die. Stacking the die makes possible thousands of interconnects and provides more than a terabyte-per-second of bandwidth between memory and the cores.

Rattner demonstrated a third major innovation, the recently announced Hybrid Silicon Laser chip developed in collaboration with researchers at University of California, Santa Barbara. With this breakthrough, dozens or maybe hundreds of Hybrid Silicon Lasers could be integrated with other silicon photonic components onto a single silicon chip. This could lead to a terabit-per-second optical link capable of speeding terabytes of data between chips inside computers, between PCs, and between servers inside data centers.


Previous
Next
IDF: Quad-core Chips in November        All News        Logitech Introduces Next-Generation Wireless Headphones for iPod, MP3
IDF: Quad-core Chips in November     PC Parts News      Aopen Cube goes dual core

Get RSS feed Easy Print E-Mail this Message

Related News
Brian Krzanich Outlines Intel's Future Strategy
Microsoft Positions Windows 10 As A Platform for the Intelligence Revolution
Intel To Axe 12,000 Jobs, Focuses On Cloud And Smart, Connected Computing Devicess
Intel Outlines Next Generation of Experiences At 2016 Intel Developers Forum Shenzhen
Intel Packs Altera Arria 10 FPGAs With Xeon E5-2600 v4 Processors
Intel Senior Executives Leaving Company
Intel Introduces Xeon Processor E5-2600 v4 And Its First 3D NAND SSDs
Chinese AI Team To Challenge Google's AlphaGo
Intel To Break From Typical Two-year CPU Release Cycle
New Intel NUC "Skull Canyon" Comes To Change the Game
Google Artificial Intelligence Program Wins Final Game In Go Tournament
Google's AlphaGo AI Machine Defeated in Fourth Game

Most Popular News
 
Home | News | All News | Reviews | Articles | Guides | Download | Expert Area | Forum | Site Info
Site best viewed at 1024x768+ - CDRINFO.COM 1998-2016 - All rights reserved -
Privacy policy - Contact Us .