Wednesday, April 16, 2014
Search
  
Submit your own News for
inclusion in our Site.
Click here...
Breaking News
AMD Demonstrates Next-Gen x86 APU Running Fedora Linux
Lenovo Introduces A to Z and FLEX 2 series Of Laptops and Desktops
Japanese Court Rejects Mt Gox Bankruptcy Protection Application
LaCie Warns Of Security Breech
Smartphone Makers, Carriers To Support Anti-theft Initiative
Samsung Galaxy S5 Carries A Very High Bill of Materials
Intel's Quarterly Net Better Than Expected
Researchers Hack Galaxy S5's Fingerprint Scanner
Active Discussions
help questions structure DVDR
Made video, won't play back easily
Questions durability monitor LCD
Questions fungus CD/DVD Media, Some expert engineer in optical media can help me?
CD, DVD and Blu-ray burning for Android in development
IBM supercharges Power servers with graphics chips
Werner Vogels: four cloud computing trends for 2014
Video editing software.
 Home > News > PC Parts > NEC Int...
Last 7 Days News : SU MO TU WE TH FR SA All News

Wednesday, September 13, 2006
NEC Introduces First Ultra-Low-Power 55-nanometer Embedded DRAM Technology


NEC Electronics Corporation today announced the industry's first 55- nanometer (nm) CMOS-compatible embedded DRAM (eDRAM) technology, UX7LSeD.

An enhancement to NEC Electronics' patented metal-insulator-metal (MIM2) technology, the new eDRAM process is the industry's first combination of hafnium silicate film and nickel silicide, which has resulted in reduced power consumption and leakage current at this advanced node. Optimized for high-speed, low-power operation, the new process can be applied to system-on-chip (SOC) devices designed for a broad range of products?from mobile equipment such as cell phones and mobile handheld devices to digital consumer devices such as gaming consoles.

The introduction of hafnium silicate film to the embedded DRAM process has allowed NEC Electronics to reduce leakage current while increasing on-current by as much as 20 percent. Reducing the leakage current is an important factor to maintaining reasonable data retention time in eDRAM macros. The new manufacturing material also has allowed NEC Electronics to continue to use polysilicon gates, as opposed to metal gates, which helps to reduce process risks for volume production.

The use of nickel silicide, a material suitable for aggressively scaled structures, helps to maintain low parasitic resistance of the scaled-down eDRAM cell and peripheral circuits and also reduce standby and operating power. Furthermore, the high dielectric constant (high-k) technology applied to the eDRAM cell transistor boosts its performance, reduces leakages and suppresses variability, as the work-function modulation effect of high-k is fully exploited to reduce transistor channel concentration.

These new materials and the proprietary MIM2 technology are enabling NEC Electronics to deliver eDRAM solutions with smaller cell sizes, higher memory integration, ample storage capacitance and lower cell heights, and all the while maintain the merits of existing eDRAM technology, such as CMOS compatibility, low power and high-speed random access.

NEC Electronics' eDRAM Technology Benefits

NEC Electronics' eDRAM combines DRAM density with SRAM-like performance, low latency and robust performance. With lower power consumption and a lower soft error rate than embedded SRAM, NEC Electronics' eDRAM has blocks that can be rotated in any orientation on a chip to simplify integration with other on-chip components while preserving the performance and power consumption benefits afforded by NEC Electronics' process. The upper metal layers of an ASIC also can be routed over the top of eDRAM blocks to simplify chip design, improve timing and conserve silicon.

The NEC Electronics process employs both a cylindrical-type stacked capacitor structure that ensures high yields and a low-temperature MIM2 capacitor that accelerates performance. The MIM2 technology uses zirconium oxide (ZrO2), a dielectric material with a high-k factor that allows the embedded DRAM's smaller bit cells to retain storage capacitance. Unlike its commodity DRAM process, NEC Electronics' eDRAM process uses the same structure as its standard CMOS process, and thus is fully compatible with it. This compatibility dramatically reduces turnaround time by minimizing the number of process steps needed to add eDRAM.

NEC Electronics' 55 nm 8-megabit (Mb) and larger embedded DRAM macros are expected to be available for volume production in the second half of 2007.


Previous
Next
Inphase Unveils First Commercial Holographic Storage Product        All News        I-O Data Adds Blu-Ray Movie Play Back to its BD Drives
Dell Offer Four New Desktops     PC Parts News      VIA Announces Carbon Free Processor

Get RSS feed Easy Print E-Mail this Message

Related News
Microsoft Reveals Kinect for Windows v2
Mobile DRAM to Account for 40 Percent of DRAM Revenue in 2014
DRAM Trends For 2014
Kinect for Windows SDK 1.8 Available
DRAM Market Reaches Maturity
NEC Display Introduces 19-inch AccuSync Desktop Monitor with IPS Panel
NEC To Stop Making Smartphones
Researchers Use Kinect As Digital Assistance To Sign-Language Users
NEC to Exit Smartphone biz: report
Big Gains Forecast in Quarterly DRAM Selling Proces
DRAM Market Matures, Says IHS
New Kinect for Windows Sensor is Coming Next Year

Most Popular News
 
Home | News | All News | Reviews | Articles | Guides | Download | Expert Area | Forum | Site Info
Site best viewed at 1024x768+ - CDRINFO.COM 1998-2014 - All rights reserved -
Privacy policy - Contact Us .