Wednesday, March 29, 2017
Search
  
Submit your own News for
inclusion in our Site.
Click here...
Breaking News
New Intel Xeon Processor E3-1200 v6 Product Family Targets Pros
Google Assistant Is Coming To More Connected Devices
Self-assembly Technique Could Solve Miniaturization Chip Making Issues
Prepare For Battle GeForce GTX Bundle Includes For Honor or Tom Clancy's Ghost Recon Wildlands Games
VIZIO's 2017 D-Series Smart TV Collection Includes 4K Ultra HD Support in Select Models
Facebook Attacks Snapchat With New Camera Features
China Tech Giant Tencent Buys 5 Percent Stake In Tesla
Hyundai Motor To Develop Its Own Automotive Chips
Active Discussions
Which of these DVD media are the best, most durable?
How to back up a PS2 DL game
Copy a protected DVD?
roxio issues with xp pro
Help make DVDInfoPro better with dvdinfomantis!!!
menu making
Optiarc AD-7260S review
cdrw trouble
 Home > News > PC Parts > Toshiba...
Last 7 Days News : SU MO TU WE TH FR SA All News

Wednesday, August 30, 2006
Toshiba Adopts Cadence Solution for 65nm Design


Cadence Design Systems announced that Toshiba has adopted Cadence QRC Extraction for its most advanced 65nm design flows.

Cadence QRC Extraction provides silicon-accurate parasitic extraction for next-generation process nodes, including sensitivity-based and chemical-mechanical polishing model-based extraction.

"To address our design and methodology requirements at 65nm and beyond, we require a solution that can deliver exceptional accuracy and includes advanced statistical and silicon variation modeling," said Takashi Yoshimori, technology executive, SoC-Design of Toshiba's semiconductor company. "After an extensive evaluation process, we found that Cadence QRC Extraction meets our requirements for 65nm accuracy today, and we have confidence that it will continue to meet our requirements for 65- and 45nm, giving us the ability to move into lower and lower geometries."

Cadence QRC Extraction provides manufacturing-aware silicon accuracy over other extraction technologies for cell-based digital designs. It dramatically reduces processing time with its near-linear performance scalability across multiple network CPUs and compute farms, said Cadence. It also delivers robust multi-corner support and native incremental signoff extraction to the Cadence Encounter digital IC platform.


Previous
Next
Verbatim Launches Flash Drives with Mandatory Security Features        All News        Google CEO Joins Apple's Board
Verbatim Launches Flash Drives with Mandatory Security Features     PC Parts News      Intel Sees Quad-Cores in Q4

Source Link Get RSS feed Easy Print E-Mail this Message

Related News
Toshiba Delays Earnings Report, Announces Recovery Plan
Toshiba Informs SK hynix of New Plan to Sell Memory Business
Foxconn Is Bidding for Toshiba Chip Business
Toshiba Starts Sampling 64-Layer, 512-gigabit 3D Flash Memory
Toshiba Books $6.3 Billion Writedown, Chairman Resigns
Toshiba Starts Construction of Fab 6 at Yokkaichi, Japan
Toshiba Announces First MN Series HDDs
SK hynix Bids for Stake in Toshiba's Memory Chip Business
Toshiba Faces New Lawsuits Over 2015 Accounting Scandal
Toshiba to Sell Part Of Its of Chip Unit
Toshiba May Spin Off Its Semiconductor Business
CES 2017: Toshiba Debuts Portege X20W 2-in-1 Convertible

Most Popular News
 
Home | News | All News | Reviews | Articles | Guides | Download | Expert Area | Forum | Site Info
Site best viewed at 1024x768+ - CDRINFO.COM 1998-2017 - All rights reserved -
Privacy policy - Contact Us .