Following the introduction of its 8GB R-DIMM in October, Samsung has now increased the density of its Fully Buffered Dual In-line Memory Module product line-up (FB-DIMM) to include 8GBs by adopting 80 nanometer 2Gb DDR for high-speed servers.
OEMs that use Samsung's high-density memory can increase the amount of installed memory and keep slots in reserve for future upgrades. Samsung says that its memory is ideal for space-constrained applications in blade and 1U servers.
Conventional memory modules use a parallel 'stub' connection in which each module in a memory channel has a separate set of links to that channel and the memory controller. With high concentrations of memory, these connections can overload the capacity of the memory controller, causing errors and delays in the flow of data.
This problem tends to negate the benefit of higher speed memory, since the faster data floods the channel, the more errors occur. What this leads to is a choice between a small amount of fast memory or a large amount of slower, more accurate memory, neither choice being ideal for modern server applications.
FB-DIMM memory uses a bi-directional serial memory bus which passes through each memory module, instead of having a single bus which each module dumps its data onto. Similar to PCI Express and other modern serial technologies, FB-DIMM transmits memory data in packets, precisely controlled by the AMB (Advanced Memory Buffer) chips built into each FB-DIMM module.
The FB-DIMM architecture overcomes the previous limitation of two-to-four module capacity per channel. A FB-DIMM system's DRAM module content can be increased to as many as eight modules without reducing the speed. The new system can also process an increased amount of data at the same time with the advanced memory buffer (AMB) chip connecting each module in the system point to point.
The FB-DIMM standard has been adopted by JEDEC, providing designers a choice between R-DIMM and FB-DIMM for next generation DRAM and system design. It is designed to add an AMB chip to the existing DRAM module, enabling the DRAM within the module to communicate with the system through this AMB chip.